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A low-cost built-in self-test for CP-PLL based on TDC

Lanhua Xia, Jianhui Wu, Zhikuang Cai, Meng Zhang, Xincun Ji
2014 IEICE Electronics Express  
The structure based on the proposed time-to-digital converter (TDC), which has high resolution and most blocks of TDC are based on the existing blocks in CP-PLL, reduces the test cost and area overhead  ...  To ensure qualification of charge-pump locked-loop (CP-PLL), a complete built-in self-test (BIST) scheme should provide functions of measurement of the clock jitter and detection of faults in CP-PLL.  ...  Some conventional low cost Built-in self-test (BIST) designs for CP-PLL are introduced in [1, 2, 3, 4, 5] .  ... 
doi:10.1587/elex.11.20140247 fatcat:kfhkklchzjbjxl6bojx5eo2try

BIST for Measuring Clock Jitter of Charge-Pump Phase-Locked Loops

Jen-Chien Hsu, Chauchin Su
2008 IEEE Transactions on Instrumentation and Measurement  
Index Terms-Analog built-in self-test (BIST), jitter measurement, on-chip measurement, phase-locked loop (PLL) BIST, timeto-digital converter (TDC).  ...  This paper presents a built-in self-test (BIST) circuit that measures the clock jitter of the charge-pump phase-locked loops (PLLs).  ...  ACKNOWLEDGMENT The authors would like to thank the National Chip Implementation Center (CIC) for the chip fabrication.  ... 
doi:10.1109/tim.2007.910109 fatcat:4vbnvyih45bmlandqzh3dqogw4

An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order ΔΣ Loop

2018 IEEE Transactions on Circuits and Systems Part 1: Regular Papers  
To characterize an on-chip programmable delay in a low-cost and high-resolution manner, a built-in self-test based on a first-order time-to-digital converter with self-calibration is proposed and implemented  ...  Index Terms-Digital-to-time converter (DTC), time-to-digital converter (TDC), buit-in selft-test (BIST), first-order delta-sigma modulator, noise shaping, self calibration, PLL.  ...  for chip fabrication.  ... 
doi:10.1109/tcsi.2018.2857999 fatcat:vwdf2n7frbccpaxhkyehbzw2la

A PLL based readout and built-in self-test for MEMS sensors

Tareq Muhammad Supon, Krishnamohan Thangarajah, Rashid Rashidzadeh, Majid Ahmadi
2011 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)  
Rashid Rashidzadeh o Thesis: A PLL based built-in self-test for MEMS sensorsWork: I have proposed and implemented a novel BIST solution for capacitive MEMS sensors using phase locked loop (PLL). 2.  ...  Barisal Zilla School, Barisal, Bangladesh  Secondary School Certificate (SSC) January 1988 -May 1998 o Major: Science o Marks: 85.1% PUBLICATIONS:  "A PLL Based Readout and Built-in Self-Test for MEMS  ... 
doi:10.1109/mwscas.2011.6026548 fatcat:zfrxoxlzjbboldz7cg4thrzj2q

Program

2021 2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)  
1 ; 1 POSTECH, Korea, 2 Samsung, Korea Abstract: This paper presents a built-in self-test (BIST) algorithm for dual-polarization millimeterwave beamforming transceivers.  ...  RTu1G-4 Sequential Loopback Built-In Self-Test Algorithm for Dual-Polarization Millimeter-Wave Phased-Array Transceivers Seunguk Choi 1 , Yuuichi Aoki 2 , Hyun-Chul Park 2 , Sung-Gi Yang 2 , Ho-Jin Song  ...  And the last talk introduces a new low cost reference clock generation method, molecular clock, for wireless network synchronization and navigation. Speakers Speakers: 1.  ... 
doi:10.1109/rfic51843.2021.9490449 fatcat:wmoshjhq3nhxxljgu46qup325u

Radiation Tolerant Electronics

Paul Leroux
2019 Electronics  
Research on radiation tolerant electronics has increased rapidly over the last few years, resulting in many interesting approaches to model radiation effects and design radiation hardened integrated circuits  ...  Acknowledgments: Thanks to the ALTER TECHNOLOGY company for making possible the monitoring and recording of the biasing and environmental test conditions during the irradiation test runs.  ...  Acknowledgments: The authors concentrate on the research of radiation effects and are devoted to the academic contributions.  ... 
doi:10.3390/electronics8070730 fatcat:wjo5prr5xjeqtlhxlj4kqz5st4

2020 Index IEEE Transactions on Circuits and Systems II: Express Briefs Vol. 67

2020 IEEE Transactions on Circuits and Systems - II - Express Briefs  
, M., see Kari Dolatabadi, A., TCSII Oct. 2020 1740-1744 Jalili, M., see Fang, X., TCSII March 2020 511-515 Jana, B., Roy, A.S., Saha, G., and Banerjee, S., A Low-Error, Memory-Based Fast Binary Logarithmic  ...  , Nitin Gujarathi, N., Venkatesh, I., and Sanyal, A., 0.6-1.2 V, 0.22 pJ/bit True Random Number Generator Based on SAR ADC; TCSII Oct. 2020 1765-1769 Je, M., see Lee, T., TCSII May 2020 876-880 Je,  ...  ., +, TCSII Dec. 2020 2968- 2972 Mitigation of "Horn Spurs" in a MASH-Based Fractional-N CP-PLL.  ... 
doi:10.1109/tcsii.2020.3047305 fatcat:ifjzekeyczfrbp5b7wrzandm7e

A Unified Multi-Functional Dynamic Spectrum Access Framework: Tutorial, Theory and Multi-GHz Wideband Testbed

Robert Qiu, Nan Guo, Husheng Li, Zhiqiang Wu, Vasu Chakravarthy, Yu Song, Zhen Hu, Peng Zhang, Zhe Chen
2009 Sensors  
One focus of this paper is to address the multi-GHz front end, which is the challenge for the next-generation cognitive sensors.  ...  Dynamic spectrum access is a must-have ingredient for future sensors that are ideally cognitive.  ...  Based on this philosophy, successive refinement is proposed in [152] , in which the test is divided into multiple stages. In stage 1, parallel CUSUM test is applied with threshold γ 1 .  ... 
doi:10.3390/s90806530 pmid:22454598 pmcid:PMC3312458 fatcat:3hljqkjzxvgpfh5vue5gbdk65q

TITUS: the Tokai Intermediate Tank for the Unoscillated Spectrum [article]

C. Andreopoulos, F.C.T. Barbato, G. Barker, G. Barr, P. Beltrame, V. Berardi, T. Berry, A. Blondel, S. Boyd, A. Bravar, F.S. Cafagna, S. Cartwright (+63 others)
2016 arXiv   pre-print
Assuming a beam power of 1.3 MW and 27.05 x 10^21 protons-on-target the sensitivity to CP and mixing parameters achieved by Hyper-Kamiokande with TITUS as a near detector is presented.  ...  The TITUS, Tokai Intermediate Tank for Unoscillated Spectrum, detector, is a proposed Gd-doped Water Cherenkov tank with a magnetised muon range detector downstream.  ...  The design of the LAPPD is based on low-cost materials, well-established industrial techniques and advances in material science.  ... 
arXiv:1606.08114v2 fatcat:2pc755bmynctrpy44il7pxm4he

Simulation and design of an UWB imaging system for breast cancer detection

Xiaolu Guo, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni
2014 Integration  
Based on the results of the behavioral simulations, low noise amplifier (LNA) and Track and Hold Amplifier (THA) can be regarded as the most critical parts for the proposed CETS receiver, as well as the  ...  In order to correctly use this numerical model, a simulator was built, which was implemented in Matlab, according to the Finite-Difference-Time-Domain (FDTD) method.  ...  The gray box in the block scheme in Figure 6 .2 encloses the CETS-based receiver. PLL, TDC and ADC are described behaviorally in VHDL-AMS (hence their different coloring in Figure 6 .2).  ... 
doi:10.1016/j.vlsi.2014.02.001 fatcat:6monjkooebfxzglgwigum5sahe

Chuang_columbia_0054D_14424.pdf [article]

2018
Chapter 2 of this thesis further highlights the challenges and trade-offs of the current LO generation scheme for possible use in sweeping LO-based spectrum analysis.  ...  Chapter 3 proposes an embedded phase-shifting LO-path design for wideband RF self-interference cancellation for full-duplex radio.  ...  a four layer FR-4 printed-circuit board for testing purpose, as shown in Fig. 4.9(a) and (b).  ... 
doi:10.7916/d86q3dnr fatcat:hnzcphvv7fhftg76k3y6hag27a

Power pulsing of the CALICE tile hadron calorimeter

Mathias Reinecke
2016 2016 IEEE Nuclear Science Symposium, Medical Imaging Conference and Room-Temperature Semiconductor Detector Workshop (NSS/MIC/RTSD)  
For example, we now know that neutrinos have a mass, providing clear evidence for physics beyond the our current understanding.  ...  Much of what we know about neutrinos comes from studying neutrino flavour oscillations, whereby one type of neutrino transforms into a different type as it propagates over a large distance.  ...  This article is based upon work from COST Action (TD1401, FAST), supported by COST (European Cooperation in Science and Technology).  ... 
doi:10.1109/nssmic.2016.8069748 fatcat:zjgd7dmfdbhntb4kfwdtrlejhi

Feasibility study to use an SRAM-based FPGA in the readout electronics of the upgraded LHCb Outer Tracker detector

Christian Färber
2014
So LHCb has been built as a single-arm forward spectrometer to maximize detection efficiency and minimize costs.  ...  Results of the first FPGA-based TDC The first design with one TDC channel was successfully tested, and the test results will be shown in this subsection.  ...  A small amount of the input gas mixture for the LHCb Outer Tracker as well as some of the output gas is used to run test modules.  ... 
doi:10.11588/heidok.00016297 fatcat:dslblbgklndu3ftrqkkyqntmxa

JUNO Conceptual Design Report [article]

T. Adam, F. An, G. An, Q. An, N. Anfimov, V. Antonelli, G. Baccolo, M. Baldoncini, E. Baussan, M. Bellato, L. Bezrukov, D. Bick (+371 others)
2015 arXiv   pre-print
The veto system is used for muon detection, muon induced background study and reduction. It consists of a Water Cherenkov detector and a Top Tracker system.  ...  It is located 53 km away from both Yangjiang and Taishan Nuclear Power Plants in Guangdong, China.  ...  In order to reduce the cost per electronics channel, design efforts for implementing a new form of ADC on an ASIC or for a self-made high-speed FADC have been started.  ... 
arXiv:1508.07166v2 fatcat:cl7vodkagbfbxm3cjvn2gtegre

A Low-Power Silicon-Photomultiplier Readout ASIC for the CALICE Analog Hadronic Calorimeter

Zhenxiong Yuan
2020
The analog hadron calorimeter based on the SiPM-on-tile technology is one of the highly granular candidates of the imaging calorimeters.  ...  To achieve the compactness, the silicon-photomultiplier (SiPM) readout electronics requires a low-power monolithic solution.  ...  In KLauS-6, a PLL-based TDC has been implemented with a quantization step of 200 ps.  ... 
doi:10.11588/heidok.00028659 fatcat:2t4xijsz45clzeffdaocclygdi
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