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A low power scheduling scheme with resources operating at multiple voltages
2002
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
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This paper presents resource and latency constrained scheduling algorithms to minimize power/energy consumption when the resources operate at multiple voltages (5 V, 3.3 V, 2.4 V, and 1.5 V). ...
Two algorithms are proposed, 1) a low complexity ( 2 ) algorithm and 2) a high complexity ( 2 log( )) algorithm, where is the number of nodes and is the latency. ...
CONCLUSION In this paper, we present a new scheduling scheme under resource and latency constraint that minimizes power/energy consumption for the case when the resources operate at multiple voltages. ...
doi:10.1109/92.988725
fatcat:6432auwxpjenla5tl3mgdeafem
A low power scheduling scheme with resources operating at multiple voltages
ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)
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This paper presents resource and latency constrained scheduling algorithms to minimize power/energy consumption when the resources operate at multiple voltages (5 V, 3.3 V, 2.4 V, and 1.5 V). ...
Two algorithms are proposed, 1) a low complexity ( 2 ) algorithm and 2) a high complexity ( 2 log( )) algorithm, where is the number of nodes and is the latency. ...
CONCLUSION In this paper, we present a new scheduling scheme under resource and latency constraint that minimizes power/energy consumption for the case when the resources operate at multiple voltages. ...
doi:10.1109/iscas.1999.777876
dblp:conf/iscas/ManzakC99
fatcat:ygvcju2eyrbahkcv6jclc34xbu
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI - GLSVLSI '03
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Furthermore, the proposed scheduling scheme is compared with combined multiple supply voltages and multicycling scheme. ...
Experimental results show that combined multiple supply voltages (¿ ¿Î ¾ Î ) and dynamic frequency clocking scheme achieves significant reductions in peak power ( ¾± on the average), average power ( ½± ...
In multiple supply voltage scheme the functional units can be operated at different supply voltages. ...
doi:10.1145/764808.764864
dblp:conf/glvlsi/MohantyRC03
fatcat:oeyw7srfsvcunm7vk67vnd7exu
Low-power scheduling with resources operating at multiple voltages
2000
IEEE transactions on circuits and systems - 2, Analog and digital signal processing
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This paper presents a resource-constrained scheduling scheme and a latency-constrained scheduling scheme that minimize power consumption for the case when the resources operate at multiple voltages. ...
Index Terms-Behavioral synthesis, latency-constrained scheduling, low-power design, multiple voltage scheduling, resource-constrained scheduling. ...
The latency-constrained scheduling scheme assigns as many nodes as possible to the resources operating at low voltages without violating the timing constraint. ...
doi:10.1109/82.847069
fatcat:sucam4bsfrayvnabeyt6eyn3zu
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI - GLSVLSI '03
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Furthermore, the proposed scheduling scheme is compared with combined multiple supply voltages and multicycling scheme. ...
Experimental results show that combined multiple supply voltages (¿ ¿Î ¾ Î ) and dynamic frequency clocking scheme achieves significant reductions in peak power ( ¾± on the average), average power ( ½± ...
In multiple supply voltage scheme the functional units can be operated at different supply voltages. ...
doi:10.1145/764863.764864
fatcat:mc3eufi7kjdddpxkl5htpi7uue
Simultaneous peak and average power minimization during datapath scheduling
2005
IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications
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The minimization schemes based on integer linear programming (ILP) are developed for the design of datapaths that can function in three modes of operation: (1) single supply voltage and single frequency ...
(SVSF), (2) multiple supply voltages and dynamic frequency clocking (MVDFC) and (3) multiple supply voltages and multicycling (MVMC). ...
Both the scheduling schemes use multiple type and number of functional units at different operating voltages as resource constraints. ...
doi:10.1109/tcsi.2005.849131
fatcat:qho5yhg22jemzcr652kg5osq2a
ILP models for simultaneous energy and transient power minimization during behavioral synthesis
2006
ACM Transactions on Design Automation of Electronic Systems
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The ILP-based datapath scheduling schemes with CPF * as objective function are developed assuming three modes of datapath operation, such as, single supply voltage and single frequency (SVSF), multiple ...
supply voltages and dynamic frequency clocking (MVDFC), and multiple supply voltages and multicycling (MVMC). ...
In this scheme, the functional units are operated at multiple supply voltages. ...
doi:10.1145/1124713.1124725
fatcat:5wvaeh37kraypcy2xcvea7fzua
Energy-efficient datapath scheduling using multiple voltages and dynamic clocking
2005
ACM Transactions on Design Automation of Electronic Systems
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Recently, dynamic frequency scaling has been explored at the CPU and system levels for power optimization. Low power datapath scheduling using multiple supply voltages has been well researched. ...
The strategy is to schedule high energy units, such as multipliers at lower frequencies so that they can be operated at lower voltages to reduce energy consumption and the low energy units, such as adders ...
A resource constrained scheduling algorithm with multiple supply voltages is given in [Kumar and Bayoumi 1999] which helps in reducing power using multiple supply voltages. ...
doi:10.1145/1059876.1059883
fatcat:5hajpmwq4ffphapfchq3q2u3ee
SLA-Based Scheduling of Bag-of-Tasks Applications on Power-Aware Cluster Systems
2010
IEICE transactions on information and systems
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Power-aware scheduling problem has been a recent issue in cluster systems not only for operational cost due to electricity cost, but also for system reliability. ...
The simulation results show that the proposed algorithms reduce much power consumption compared to static voltage schemes. ...
Many recent commodity processors support DVS with multiple operating points. ...
doi:10.1587/transinf.e93.d.3194
fatcat:3zebtpo5k5eixjbc4xlzhhy7ai
Power Aware Scheduling of Bag-of-Tasks Applications with Deadline Constraints on DVS-enabled Clusters
2007
Seventh IEEE International Symposium on Cluster Computing and the Grid (CCGrid '07)
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As recent commodity processors support multiple operating points under various supply voltage levels, Dynamic Voltage Scaling (DVS) scheduling algorithms can reduce power consumption by controlling appropriate ...
Power-aware scheduling problem has been a recent issue in cluster systems not only for operational cost due to electricity cost, but also for system reliability. ...
Many recent commodity processors support DVS with multiple operating points. ...
doi:10.1109/ccgrid.2007.85
dblp:conf/ccgrid/KimBK07
fatcat:vgooq3qqr5bqjle3v6jsjulv4y
A framework for energy and transient power reduction during behavioral synthesis
2004
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
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Index Terms-Peak power, peak power differential, average power, power fluctuation, multiple supply voltages, dynamic frequency clocking, low-power datapath scheduling. ...
Minimizing CPF using multiple supply voltages and dynamic frequency clocking under resource constraints results in the reduction of both energy and transient power. ...
A low power design using multiple clocking scheme is presented in [28] . ...
doi:10.1109/tvlsi.2004.827568
fatcat:vnkpale2o5asbgee3owupxddp4
Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains
2007
Journal of Supercomputing
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integrating DVS, PG, and the scheduling of resources in multiple voltage domains (MVD) to achieve low energy consumption. ...
One issue that remains to be solved is integrating these techniques in correlated domains operating with multiple voltages. ...
Acknowledgements This work was supported in part by Ministry of Economic Affairs under grant no. 95-EC-17-A-01-S1-034 and 96-EC-17-A-01-S1-034, by National Science Council under grant no. 95-2220-E-007 ...
doi:10.1007/s11227-007-0132-6
fatcat:aces2ipuonedphkn2vl4esqgga
Performance-Aware Power Management in Embedded Controllers with Multiple-Voltage Processors
2008
Information Technology Journal
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2008 pre-print arXiv:0809.4929v1 fatcat:ocbpnm2k5vc5fdmcv3jyqcgqxi
Taking advantage of the dynamic voltage scaling (DVS) technology, this paper develops a performance-aware power management scheme for embedded controllers with processors that allow multiple voltage levels ...
To avoid the waste of CPU resources as a result of the discrete voltage levels, a resource reclaiming mechanism is employed to maximize the CPU utilization and also to improve the QoC. ...
Acknowledgement The first author would like to thank Prof Yu-Chu Tian at QUT, Australia, for helpful discussions. ...
doi:10.3923/itj.2008.942.947
fatcat:krvxhnvfkjbf5ewm4632r2bena
Approaches to low-power implementations of DSP systems
2001
IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications
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A well established retiming approach can be generalized to find those noncritical gates which can be operated with lower supply voltages to reduce the overall system power consumption. ...
Reduction of switching activity at one or both inputs of the multipliers is a key to reduction of power consumption in FIR filters and equalizers. ...
Most of the results presented here are a review of his joint work with them. He also wishes to thank T. Zhang for his help in preparation of this paper. ...
doi:10.1109/81.956016
fatcat:ny2wvwyxcrbxzngwbtixvif7py
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
[chapter]
2005
Lecture Notes in Computer Science
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integration of the elements of DVS, PG, and the scheduling for correlations of multiple domain resources. ...
In this paper, we investigate the problem of power-aware scheduling tasks running on a scalable encryption processor, which is equipped with heterogenous distributed SOC designs and needs the effective ...
This work gives an exploration study for variable voltage scheduling resources of multiple domains with correlations. ...
doi:10.1007/11532378_33
fatcat:ebjelxhhafaolk3f5arajucr4i
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