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A first-order fine-grained multithreaded throughput model

X.E. Chen, T.M. Aamodt
2009 2009 IEEE 15th International Symposium on High Performance Computer Architecture  
Then it presents a Markov chain model for analytically estimating the throughput of multicore, fine-grained multithreaded architectures.  ...  We also demonstrate the application of our model to a design problem-optimizing the design of fine-grained multithreaded chip multiprocessors for application-specific workloads-yielding the same result  ...  providing access to the Sun Fire T1000 machine we compared against in this study, as well as Lawrence Spracklen and Sun Microsystems for access to additional hardware and for help when we validated our models  ... 
doi:10.1109/hpca.2009.4798270 dblp:conf/hpca/ChenA09 fatcat:qiqrvnavcjebhjjbgelx6t5h24

Simultaneous multithreading

Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
1998 25 years of the international symposia on Computer architecture (selected papers) - ISCA '98  
Simultaneous multithreading has the potential to achieve 4 times the throughput of a superscalar, and double that of fine-grain multithreading.  ...  We present several models of simultaneous multithreading and compare them with alternative organizations: a wide superscalar, a fine-grain multithreaded processor. and single-chip, multiple-issue multiprocessing  ...  in a fine-grained manner.  ... 
doi:10.1145/285930.286011 dblp:conf/isca/TullsenEL98a fatcat:wzwmqqcnj5bz3faupjps7d6tay

Simultaneous multithreading

Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
1995 SIGARCH Computer Architecture News  
Simultaneous multithreading has the potential to achieve 4 times the throughput of a superscalar, and double that of fine-grain multithreading.  ...  We present several models of simultaneous multithreading and compare them with alternative organizations: a wide superscalar, a fine-grain multithreaded processor, and single-chip, multiple-issue multiprocessing  ...  in a fine-grained manner.  ... 
doi:10.1145/225830.224449 fatcat:gtheubj4tbcqxokcmbrfoihxym

Simultaneous multithreading

Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
1995 Proceedings of the 22nd annual international symposium on Computer architecture - ISCA '95  
Simultaneous multithreading has the potential to achieve 4 times the throughput of a superscalar, and double that of fine-grain multithreading.  ...  We present several models of simultaneous multithreading and compare them with alternative organizations: a wide superscalar, a fine-grain multithreaded processor, and single-chip, multiple-issue multiprocessing  ...  in a fine-grained manner.  ... 
doi:10.1145/223982.224449 dblp:conf/isca/TullsenEL95 fatcat:rj3illxasbalhkiz4ygcsjsvdi

A simultaneous multithreading heterogeneous object recognition processor with machine learning based dynamic resource management

Jinwook Oh, Gyeonghoon Kim, Junyoung Park, Injoon Hong, Seungjin Lee, Joo-Young Kim, Hoi-Jun Yoo
2012 2012 IEEE COOL Chips XV  
The multithreading architecture with Q-learning based dynamic resource management enables concurrent processing of 8 region-of-interests with 5-stage fine grained recognition pipeline outperforming previous  ...  A simultaneous multithreading multicore processor is proposed to accelerate object recognition for 720p HD video streams.  ...  Therefore, in this paper the simultaneous multithreading multicore processor is proposed to increase not only system throughput with multithreading and 5-stage fine grained pipeline but also full-utilization  ... 
doi:10.1109/coolchips.2012.6216579 dblp:conf/coolchips/OhKPHLKY12 fatcat:qqe4j4iz4fcrzbzemiyy2ekdku

OS Mechanism for Continuation-based Fine-grained Threads on Dedicated and Commodity Processors

Shigeru Kusakabe, Satoshi Yamada, Mitsuhiro Aono, Masaaki Izumi, Satoshi Amamiya, Yoshinari Nomura, Hideo Taniguchi, Makoto Amamiya
2007 2007 IEEE International Parallel and Distributed Processing Symposium  
Fine-grained multithreading based on a natural model, such as dataflow model, is promising in achieving high efficiency and high programming productivity.  ...  In this paper, we discuss operating system issues for fine-grained multithread programs. We are developing an operating system called CEFOS based on a dataflow based computation model.  ...  We believe fine-grained multithreading based on a natural model, such as dataflow model, is a promising approach.  ... 
doi:10.1109/ipdps.2007.370678 dblp:conf/ipps/KusakabeYAIANTA07 fatcat:hxe2x226ybanjospgqszb53ifi

Simultaneous multithreading: a platform for next-generation processors

S.J. Eggers, J.S. Emer, H.M. Levy, J.L. Lo, R.L. Stamm, D.M. Tullsen
1997 IEEE Micro  
First, fine-grained multithreading eliminates only vertical waste; given the latency-hiding capability of its out-of-order processor and lockup-free caches, four threads were sufficient to do that.  ...  SMT vs. fine-grained multithreading. By eliminating vertical waste, the fine-grained multithreaded architecture provided speedups over the superscalar as high as 1.3 on both workloads.  ...  Emer is a senior consulting engineer at Digital Equipment Corp., where he has worked on processor performance analysis and performance modeling methodologies for a number of VAX and Alpha CPUs.  ... 
doi:10.1109/40.621209 fatcat:zmx4yx2flnfazi3b6zdwhavnam

Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture

Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao
2007 2007 IEEE International Parallel and Distributed Processing Symposium  
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip.  ...  Its peak throughput reaches 884Mbps on the Gigabit Ethernet, even it is running at the user-level on a single-processor Linux machine; (4) Extensive application test cases are passed and no reliability  ...  (a) Coarse-Grain Lock & (b) Fine-Grain Lock The coarse-grain lock schema is shown in Figure 8(a) .  ... 
doi:10.1109/ipdps.2007.370677 dblp:conf/ipps/GanHCG07 fatcat:noaxvqhicjcmrldsfuux7cd3ve

A Survey on Hardware and Software Support for Thread Level Parallelism [article]

Somnath Mazumdar, Roberto Giorgi
2016 arXiv   pre-print
Todays computers are built upon multiple processing cores and run applications consisting of a large number of threads, making runtime thread management a complex process.  ...  In this paper, first, we have given an overview of threads, threading mechanisms and its management issues during execution.  ...  Some of the PowerPC based processor models support coarse grain as well as fine grain multithreading.  ... 
arXiv:1603.09274v3 fatcat:75isdvgp5zbhplocook6273sq4

ILP Based Multithreaded Code Generation for Simulink Model

Kai HUANG, Min YU, Xiaomeng ZHANG, Dandan ZHENG, Siwen XIU, Rongjie YAN, Kai HUANG, Zhili LIU, Xiaolang YAN
2014 IEICE transactions on information and systems  
In this paper, we consider the issue of increasing processor utilization and reducing communication cost during multithreaded code generation from Simulink models to improve system performance.  ...  We propose a combination of three-layered multithreaded software with Integer Linear Programming (ILP) based designtime mapping and scheduling policies to get optimal performance.  ...  An obvious problem in fine-grained multithreaded code generation is that breaking a task into finer grained subtasks incurs higher overhead in terms of scheduling and synchronizing the sub-tasks.  ... 
doi:10.1587/transinf.2014pap0015 fatcat:6fggmadyjnan7nhqt455ipcrfu

A Prototype Multithreaded Associative SIMD Processor

Kevin Schaffer, Robert A. Walker
2007 2007 IEEE International Parallel and Distributed Processing Symposium  
In this paper, we describe a SIMD processor architecture that combines a fully pipelined broadcast/reduction network with hardware multithreading to reduce performance degradation as the number of processors  ...  This is especially true of hybrid SIMD models, such as associative computing, that make extensive use of global search operations.  ...  The Multithreaded ASC Processor described in this paper uses fine-grain multithreading.  ... 
doi:10.1109/ipdps.2007.370471 dblp:conf/ipps/SchafferW07 fatcat:4jpenxo2cfffrb5t4wk4aikc6i

Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors

Xi E. Chen, Tor Aamodt
2012 IEEE transactions on computers  
This paper also presents a novel Markov chain throughput model.  ...  This paper proposes an analytical model for accurately predicting the impact of contention on cache miss rates. The focus is multiprogrammed workloads running on multithreaded manycore architectures.  ...  ACKNOWLEDGMENTS We thank Greg Steffan, Lawrence Spracklen and Sun Microsystems for access to hardware and help with validating our models against the Sun Fire T1000.  ... 
doi:10.1109/tc.2011.141 fatcat:reehtfxtoreqxgrgjbrmqwogde

Fairness and Throughput in Switch on Event Multithreading

Ron Gabor, Shlomo Weiss, Avi Mendelson
2006 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06)  
Switch On Event multithreading is a low power and low complexity mechanism to improve processor throughput by switching threads on execution stalls.  ...  The need to reduce power and complexity will increase the interest in Switch on Event multithreading (coarse grained multithreading).  ...  Fetch prioritization [29, 41] is a fine grained prioritization approach appropriate for SMT. It prioritizes fetches from the different threads.  ... 
doi:10.1109/micro.2006.25 dblp:conf/micro/GaborWM06 fatcat:5fitcjkza5hn5ehnw4mlavki5q

Symbiotic jobscheduling with priorities for a simultaneous multithreading processor

Allan Snavely, Dean M. Tullsen, Geoff Voelker
2002 Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '02  
This paper demonstrates that a scheduler for an SMT machine can both satisfy process priorities and symbiotically schedule low and high priority threads to increase system throughput.  ...  Naive priority schedulers dedicate the machine to high priority jobs to meet priority goals, and as a result decrease opportunities for increased performance from multithreading and coscheduling.  ...  By contrast, the Tera MTA supercomputer [3] , which features fine-grain multithreading, has fewer shared system resources and less intimate interactions between threads.  ... 
doi:10.1145/511339.511343 fatcat:s4kduxzdz5f3pj3twqa3z5fwba

Symbiotic jobscheduling with priorities for a simultaneous multithreading processor

Allan Snavely, Dean M. Tullsen, Geoff Voelker
2002 Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '02  
This paper demonstrates that a scheduler for an SMT machine can both satisfy process priorities and symbiotically schedule low and high priority threads to increase system throughput.  ...  Naive priority schedulers dedicate the machine to high priority jobs to meet priority goals, and as a result decrease opportunities for increased performance from multithreading and coscheduling.  ...  By contrast, the Tera MTA supercomputer [3] , which features fine-grain multithreading, has fewer shared system resources and less intimate interactions between threads.  ... 
doi:10.1145/511334.511343 dblp:conf/sigmetrics/SnavelyTV02 fatcat:w43kfzdrijg7fnnqm5v2j4fvty
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