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System-Level Modeling Environment: MLDesigner

Ankur Agarwal, Cyril-Daniel Iskander, Ravi Shankar, Georgiana Hamza-Lup
2008 2008 2nd Annual IEEE Systems Conference  
Along with supporting various MOCs, a modeling environment should also support a well developed library. In this paper, we have explored and compared various system modeling environments.  ...  We further present an abstract model of a Network-on-Chip (NoC) in MLDesigner and show latency results for various customizable parameters for this model.  ...  Furthermore, MLDesigner is used for various applications, from wireless applications to embedded system design. Hence, it is not limited to a particular target application or domain.  ... 
doi:10.1109/systems.2008.4519020 fatcat:svghfgi24zc3jhclnrsdve65ae

A Methodology for Prototyping Flexible Embedded Systems

John Sachs Beeckler, Warren J. Gross
2007 2007 Canadian Conference on Electrical and Computer Engineering  
A methodology is presented for prototyping flexible, custom embedded systems using low-cost reconfigurable hardware, open-source FPGA-ware, and open-source software.  ...  The system is intended as a lowcost, flexible, and reconfigurable platform with multimedia and networking capabilities, for prototyping interactive entertainment applications.  ...  SOFTWARE Software development for the system is done using opensource libraries, kernels, and the GNU SPARC tool-chain.  ... 
doi:10.1109/ccece.2007.420 fatcat:kpzpcc7rrnhorlvbnyccjochaa

PARADISE: Design Environment for Para llel & Dis tributed, E mbedded Real-Time Systems [chapter]

W. Hardt, P. Altenbernd, C. Böke, G. Castillo, C. Ditze, E. Erpenbach, U. Glässer, B. Kleinjohann, G. Lehrenfeld, F. J. Rammig, C. Rust, F. Stappert (+2 others)
1999 Distributed and Parallel Embedded Systems  
The integration of several core competencies is essential for establishing a methodological structured design process for parallel distributed embedded realtime systems.  ...  Our activities are based on wide. theoretically well-founded concepts and tool support is built upon these theoretically foundations. F. J. Rammig (ed.), Distributed and Parallel Embedded Systems  ...  DReaMS [Di98] is a customizable library operating system intended to be used as a basis for the synthesis of either application-specific run-time platforms or operating system kernel in both fields (  ... 
doi:10.1007/978-0-387-35570-2_16 fatcat:m3zhjw2uz5bt7iw6w6vt7xqhay

ASAM: Automatic architecture synthesis and application mapping

Lech Jozwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri (+2 others)
2013 Microprocessors and microsystems  
This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors  ...  Finally, it discusses the ASAM design-flow, its main stages and tools and their application to a real-life case study.  ...  Acknowledgements The research reported in this paper has been performed in the scope of the ASAM project of the European ARTEMIS Research Program and has been partly supported by the ARTEMIS Joint Undertaking  ... 
doi:10.1016/j.micpro.2013.08.006 fatcat:tztiewd7vzfc5jtki2tcwursca

Using VLIW softcore processors for image processing applications

Joost Hoozemans, Stephan Wong, Zaid Al-Ars
2015 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)  
high image processing performance for the targeted application.  ...  Results show that the rVEX softcore processor can achieve remarkably better performance compared to the industry-standard Xilinx MicroBlaze (up to a factor of 3.2 times faster) on image processing applications  ...  In [9] , the architecture and micro-architecture of a customizable softcore VLIW processor are presented. Additionally, tools are discussed to customize, generate, and program this processor.  ... 
doi:10.1109/samos.2015.7363691 dblp:conf/samos/HoozemansWA15 fatcat:tt6qnk2xobb2hjzg4iml7yrt7a

Lx

Paolo Faraboschi, Geoffrey Brown, Joseph A. Fisher, Giuseppe Desoli, Fred Homewood
2000 SIGARCH Computer Architecture News  
For Lx we developed the architecture and software from the beginning to support both scalability (variable numbers of identical processing resources) and customizability (special purpose resources).  ...  Finally we show that customization on an application-by-application basis is today still very dangerous and much remains to be done for it to become a viable solution.  ...  The combination of application complexity and time-to-market considerations is what makes a software-based approach to embedded systems particularly appealing today.  ... 
doi:10.1145/342001.339682 fatcat:vsuggv6kvjaiviapmaltkro3q4

Lx

Paolo Faraboschi, Geoffrey Brown, Joseph A. Fisher, Giuseppe Desoli, Fred Homewood
2000 Proceedings of the 27th annual international symposium on Computer architecture - ISCA '00  
For Lx we developed the architecture and software from the beginning to support both scalability (variable numbers of identical processing resources) and customizability (special purpose resources).  ...  Finally we show that customization on an application-by-application basis is today still very dangerous and much remains to be done for it to become a viable solution.  ...  The combination of application complexity and time-to-market considerations is what makes a software-based approach to embedded systems particularly appealing today.  ... 
doi:10.1145/339647.339682 fatcat:oesrifattbbuji2vaoidbxqmrm

Embedded Computing: New Directions in Architecture and Automation [chapter]

B. Ramakrishna Rau, Michael S. Schlansker
2000 Lecture Notes in Computer Science  
In turn, we believe that this will lead to significantly different computer architectures, at both the system and the processor levels, and a rich diversity of off-the-shelf and custom designs.  ...  With the advent of system level integration (SLI) and system-on-chip (SOC), the center of gravity of the computer industry is moving from personal computing into embedded computing.  ...  They, along with the authors, are responsible for the development of the PICO system.  ... 
doi:10.1007/3-540-44467-x_21 fatcat:gwpe46bscbamjj6vzzmy7agw4a

Fine-grained application source code profiling for ASIP design

Kingshuk Karuri, Mohammad Abdullah Al Faruque, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2005 Proceedings of the 42nd annual conference on Design automation - DAC '05  
We show how the microprofiler is embedded into an advanced ASIP design flow and justify its use in a case study to design an MP3 decoder ASIP.  ...  However, for improved design efficiency, additional pre-architecture exploration tools are required to help narrow-down the huge design space and making coarsegrained Instruction Set Architecture (ISA)  ...  Around 80% of execution time, in any average run, is spent inside this kernel code. We decided to customize a simple processor 2 for this application kernel using inputs from µP.  ... 
doi:10.1145/1065579.1065666 dblp:conf/dac/KaruriFKLAM05 fatcat:5ltwg23agzf4bccvulxms7l2ly

Fine-grained application source code profiling for ASIP design

K. Karuri, M.A. Al Faruque, S. Kraemer, R. Leupers, G. Ascheid, H. Meyr
2005 Proceedings. 42nd Design Automation Conference, 2005.  
We show how the microprofiler is embedded into an advanced ASIP design flow and justify its use in a case study to design an MP3 decoder ASIP.  ...  However, for improved design efficiency, additional pre-architecture exploration tools are required to help narrow-down the huge design space and making coarsegrained Instruction Set Architecture (ISA)  ...  Around 80% of execution time, in any average run, is spent inside this kernel code. We decided to customize a simple processor 2 for this application kernel using inputs from µP.  ... 
doi:10.1109/dac.2005.193827 fatcat:kttfhl6qlbhntaom6fzoldzq6a

Efficient Embedded Software Migration towards Clusterized Distributed-Memory Architectures

Rafael Garibotti, Anastasiia Butko, Luciano Ost, Abdoulaye Gamatie, Gilles Sassatelli, Chris Adeniyi-Jones
2016 IEEE transactions on computers  
This paper proposes a solution tailored for an efficient execution of applications defined with shared-memory programming models onto on-chip distributed-memory multicore architectures.  ...  A large portion of existing multithreaded embedded sofware has been programmed according to symmetric shared memory platforms where a monolithic memory block is shared by all cores.  ...  ACKNOWLEDGMENTS The research leading to these results has received funding from the European Community's Seventh Framework Programme (FP7/2007-2013) under the Mont-Blanc Project: www.montblanc-project.eu  ... 
doi:10.1109/tc.2015.2485202 fatcat:v2lbaqig5zd6zdr3h5afrhit3u

Application Specific Customization and Scalability of Soft Multiprocessors

Deepak Unnikrishnan, Jia Zhao, Russell Tessier
2009 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines  
Figure 5 : 5 A methodology to derive application specific embedded cores [12] in system synthesis.  ...  The derived KPN specification is given as input to the embedded system-level platform synthesis and application mapping (ESPAM) tool, as shown in Figure 2 .  ... 
doi:10.1109/fccm.2009.41 dblp:conf/fccm/UnnikrishnanZT09 fatcat:7cjy7ltl4rcyzlo7e2p4hdecdq

Co-synthesis and co-simulation of control-dominated embedded systems

Alessandro Balboni, William Fornaciari, Donatella Sciuto
1996 Design automation for embedded systems  
This paper presents a methodology for hardware/software co-design with particular emphasis on the problems related to the concurrent simulation and synthesis of hardware and software parts of the overall  ...  The proposed methodology is oriented towards the application field of controldominated embedded systems implemented onto a single chip.  ...  In the following we will refer to the class of embedded systems which are dedicated to a specific application.  ... 
doi:10.1007/bf00133305 fatcat:i5yb6xbdyfevrfd4hqudpjxbv4

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration

D. Pnevmatikatos, K. Papadimitriou, T. Becker, P. Böhm, A. Brokalakis, K. Bruneel, C. Ciobanu, T. Davidson, G. Gaydadjiev, K. Heyse, W. Luk, X. Niu (+9 others)
2015 Microprocessors and microsystems  
The FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration) EU FP7 project, aims to ease the design and implementation of dynamically changing hardware systems.  ...  Our tool-chain supports both coarse-and fine-grain FPGA reconfiguration, while during execution a flexible run-time system manages the reconfigurable resources.  ...  Acknowledgement This work was supported by the European Commission -Belgium in the context of FP7 FASTER project (#287804).  ... 
doi:10.1016/j.micpro.2014.09.006 fatcat:35jcur7nljhw7hqletmdrqjhum

Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAs

Emanuele Del Sozzo, Davide Conficconi, Alberto Zeni, Mirko Salaris, Donatella Sciuto, Marco D. Santambrogio
2022 ACM Computing Surveys  
We review these abstraction solutions, provide a timeline, and propose a taxonomy for each abstraction trend: programming models for HDLs; IP-based or System-based toolchains for HLS; application, architecture  ...  They are state-of-the-art for prototyping, telecommunications, embedded, and an emerging alternative for cloud-scale acceleration.  ...  ACKNOWLEDGEMENTS The authors are grateful for feedbacks from Reviewers and NECSTLab members, with a particular mention to A. Damiani, A. Parravicini, E. D'Arnese, F. Carloni, F. Peverelli, and R.  ... 
doi:10.1145/3532989 fatcat:nsk5lwvt3vba5fbxmaj7sgpwru
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