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Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks

Zhiqiang Que, Hiroki Nakahara, Hongxiang Fan, He Li, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk
<span title="2022-05-17">2022</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/qfvmhupy5fb6tcrtb2orjpq5e4" style="color: black;">ACM Transactions on Reconfigurable Technology and Systems</a> </i> &nbsp;
When compared with a Tesla V100 GPU implementation, our design achieves 6.5 times better performance and 15.6 times higher power efficiency, showing that our approach contributes to high performance and  ...  Second, the partitioning of this hardware architecture into multiple full-fledged sub-accelerator cores, enabling spatially co-execution of multiple RNN/LSTM inferences.  ...  ACKNOWLEDGMENTS The support of the United Kingdom EPSRC (grant numbers EP/V028251/1, EP/L016796/1, EP/N031768/1, EP/P010040/1, and EP/S030069/1), Corerain and Intel is gratefully acknowledged.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3534969">doi:10.1145/3534969</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/g2lj3qnv3bdsxb5mkmwlkoezpu">fatcat:g2lj3qnv3bdsxb5mkmwlkoezpu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20220518132420/https://dl.acm.org/doi/pdf/10.1145/3534969" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/bc/7e/bc7e3fb53c7c36467ecfd09559b5ff32446818ae.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3534969"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

A 52-mW 8.29mm2 19-mode LDPC decoder chip for Mobile WiMAX applications

Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, An-Yeu Wu
<span title="">2009</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/fkjmyf3l45eo5ovjdnpeqpdjd4" style="color: black;">2009 Asia and South Pacific Design Automation Conference</a> </i> &nbsp;
The multi-mode chip implemented in 8.29mm 2 die area can be maximally measured at 83.3MHz with only 52mW power consumption.  ...  An efficient IC design strategy is proposed to reduce 31.25% decoding latency, and enhance hardware utilization ratio from 50% to 75%.  ...  Acknowledgement This work was supported by National Science Council, and the Ph.D. fellowship program of MediaTeK Education Foundation.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/aspdac.2009.4796462">doi:10.1109/aspdac.2009.4796462</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/aspdac/ShihZLW09.html">dblp:conf/aspdac/ShihZLW09</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/u3fai7bfevfhdectvs5gyrq2hu">fatcat:u3fai7bfevfhdectvs5gyrq2hu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170812075416/http://access.ee.ntu.edu.tw/Publications/Conference/CA88_2009.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/7e/0a/7e0a4c494cd0f75097167616dfc3e4f5b4a4e44d.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/aspdac.2009.4796462"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

AES Datapath Optimization Strategies for Low-Power Low-Energy Multisecurity-Level Internet-of-Things Applications

Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigne, Xuan-Tu Tran
<span title="">2017</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/uqbr2omxsbdgtaxslmblka2nnu" style="color: black;">IEEE Transactions on Very Large Scale Integration (vlsi) Systems</a> </i> &nbsp;
In this paper, we present our hardware optimization strategies for AES for high-speed ultralow-power ultralow-energy IoT applications with multiple levels of security.  ...  However, these security functions take a large amount of processing power and power/energy consumption.  ...  implemented in hardware.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tvlsi.2017.2716386">doi:10.1109/tvlsi.2017.2716386</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/dd55mu5zzbhtfdgtcdor6qadeu">fatcat:dd55mu5zzbhtfdgtcdor6qadeu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200306022210/https://hal-cea.archives-ouvertes.fr/cea-02193684/file/Duy.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/5c/ef/5cef1e2c732a0b2ed27d05f1c38af8ee5a9db708.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tvlsi.2017.2716386"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

DYRE: a DYnamic REconfigurable solution to increase GPGPU's reliability

Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone
<span title="2021-03-29">2021</span> <i title="Springer Science and Business Media LLC"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/qhbautqnvzgwvm3vvdvieylhwq" style="color: black;">Journal of Supercomputing</a> </i> &nbsp;
The proposed solution was evaluated in terms of reliability improvement and area, performance, and power overhead costs.  ...  However, it is well known that these devices' reliability may be limited by the rising of faults at the hardware level.  ...  The proposed strategy was implemented in a representative GPGPU, and the hardware and power overhead were measured.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s11227-021-03751-2">doi:10.1007/s11227-021-03751-2</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/jkeu6ikz4bgxvgwid5lalhgnhu">fatcat:jkeu6ikz4bgxvgwid5lalhgnhu</a> </span>
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A software controlled voltage tuning system using multi-purpose ring oscillators [article]

Steve Kerrison, Kerstin Eder
<span title="2015-03-19">2015</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
core frequency.  ...  The tuning method and software control framework is demonstrated on a sample of XMOS XS1-U8A-64 embedded microprocessors, yielding a dynamic power saving of up to 25% with no performance reduction and  ...  Acknowledgments The authors would like to thank Henk Muller and Jon Ferguson at XMOS for the supply of hardware enabling this research.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1503.05733v1">arXiv:1503.05733v1</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/fmsjuoo3erh4vinezfqao4fz5e">fatcat:fmsjuoo3erh4vinezfqao4fz5e</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200910160411/https://arxiv.org/pdf/1503.05733v1.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/bf/4c/bf4cc588620fda5ba9a07efe9b164e65ac2ae84c.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1503.05733v1" title="arxiv.org access"> <button class="ui compact blue labeled icon button serp-button"> <i class="file alternate outline icon"></i> arxiv.org </button> </a>

Automated power gating methodology for dataflow-based reconfigurable systems

Tiziana Fanni, Carlo Sau, Luigi Raffo, Francesca Palumbo
<span title="">2015</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/x53imphnrjflrnceoffhfenvzi" style="color: black;">Proceedings of the 12th ACM International Conference on Computing Frontiers - CF &#39;15</a> </i> &nbsp;
In particular, we are focussing on the automation of power gating. The methodology has been evaluated on an image processing use case targeting an ASIC 90 nm CMOS technology.  ...  In this paper, we will demonstrate as they can be used to automatically achieve power management since the earliest stage of the design flow.  ...  isEmpty(V i ) then SN = V i ; Power Gating Implementation At the hardware level, we have exploited the LRs to implement power gating (PG).  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/2742854.2747285">doi:10.1145/2742854.2747285</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/cf/FanniSRP15.html">dblp:conf/cf/FanniSRP15</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/pz5oewiygfairipnwpzibfnhai">fatcat:pz5oewiygfairipnwpzibfnhai</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170922012159/https://iris.unica.it/retrieve/handle/11584/138169/87155/a61-fanni.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d7/96/d796103c6b6997907535e240a3be4db13551cca5.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/2742854.2747285"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

An Efficient Hardware Implementation of Residual Data Binarization in HEVC CABAC Encoder

Dinh-Lam Tran, Xuan-Tu Tran, Duy-Hieu Bui, Cong-Kha Pham
<span title="2020-04-23">2020</span> <i title="MDPI AG"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ikdpfme5h5egvnwtvvtjrnntyy" style="color: black;">Electronics</a> </i> &nbsp;
This paper proposes an efficient hardware implementation of a binarizer for CABAC that focuses on low area cost, low power consumption while still providing enough bins for high-throughput CABAC.  ...  In addition, our design also achieved a high power-efficiency of 8288 Mbins/mW; this is important factor for handheld applications.  ...  Conflicts of Interest: The authors declare no conflict of interest.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.3390/electronics9040684">doi:10.3390/electronics9040684</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ogpykgzjf5b3zniz6e7d4anxm4">fatcat:ogpykgzjf5b3zniz6e7d4anxm4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200504140441/https://res.mdpi.com/d_attachment/electronics/electronics-09-00684/article_deploy/electronics-09-00684.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/a6/67/a667ef357744f6f154d9435a54aaa91e465932e5.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.3390/electronics9040684"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> mdpi.com </button> </a>

How soccer players would do stream joins

Jens Teubner, Rene Mueller
<span title="">2011</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/vxrc3vebzzachiwy3nopwi3h5u" style="color: black;">Proceedings of the 2011 international conference on Management of data - SIGMOD &#39;11</a> </i> &nbsp;
Handshake join naturally leverages available hardware parallelism, which we demonstrate with an implementation on a modern multicore system and on top of field-programmable gate arrays (FPGAs), an emerging  ...  In spite of the omnipresence of parallel (multi-core) systems, the predominant strategy to evaluate window-based stream joins is still strictly sequential, mostly just straightforward along the definition  ...  Section 4 discusses how handshake join could be implemented in computing systems, which we realize with a prototype implementation on top of a modern multi-core CPU (Section 5) and with a massively parallel  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1989323.1989389">doi:10.1145/1989323.1989389</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/sigmod/TeubnerM11.html">dblp:conf/sigmod/TeubnerM11</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/iultgo2lw5cahglhfnpeztuuby">fatcat:iultgo2lw5cahglhfnpeztuuby</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808230807/http://dbis.cs.tu-dortmund.de/cms/en/publications/2011/soccer-players/soccer-players.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/e1/96/e19603035553dbe020dacf983b4e3e07f36d3d2a.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1989323.1989389"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera

Robin Bonamy, Sébastien Bilavarn, Fabrice Muller, François Duhem, Simon Heywood, Philippe Millet, Fabrice Lemonnier
<span title="2018-06-21">2018</span> <i title="Wiley"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/fxzyscw7kbbrnftdz4txqtwl4a" style="color: black;">International journal of circuit theory and applications</a> </i> &nbsp;
of hardware acceleration.  ...  We show how a tight integration of exploration, energy-aware scheduling, common power models, and decision support in heterogeneous DPR multiprocessor SoC mapping can be used to improve the energy efficiency  ...  ACKNOWLEDGMENTS This work was carried out under the BENEFIC project (CA505), a project labeled within the framework of CATRENE, the EUREKA cluster for Application and Technology Research in Europe on NanoElectronics  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1002/cta.2508">doi:10.1002/cta.2508</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/edswp7sf3bh5pmzwtc5pvq2pqy">fatcat:edswp7sf3bh5pmzwtc5pvq2pqy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20190503181849/https://hal.archives-ouvertes.fr/hal-01821809/document" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/76/a9/76a9ed981d37e56f0d47fd86f24858ffc6726c38.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1002/cta.2508"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> wiley.com </button> </a>

Data processing on FPGAs

Rene Mueller, Jens Teubner, Gustavo Alonso
<span title="2009-08-01">2009</span> <i title="VLDB Endowment"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/p6rqwwpkkjbcldejepcehaalby" style="color: black;">Proceedings of the VLDB Endowment</a> </i> &nbsp;
Such a trend opens up interesting opportunities but also raises immense challenges since the efficient use of heterogeneous many-core systems is not a trivial problem.  ...  of power consumption and parallel stream evaluation.  ...  This project is funded in part by the Enterprise Computing Center of ETH Zurich (http://www.ecc.ethz.ch/).  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.14778/1687627.1687730">doi:10.14778/1687627.1687730</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/3hw3cmojkzakpfdf773r4b2ymy">fatcat:3hw3cmojkzakpfdf773r4b2ymy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170810170551/http://www.vldb.org/pvldb/2/vldb09-603.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/b6/f8/b6f83d871948e3f4216026b0455ddebfb1cf3b1a.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.14778/1687627.1687730"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

Network intrusion detection using hardware techniques: A review

Razan Abdulhammed, Miad Faezipour, Khaled M. Elleithy
<span title="">2016</span> <i title="IEEE"> 2016 IEEE Long Island Systems, Applications and Technology Conference (LISAT) </i> &nbsp;
This paper reviews and compares hardware based techniques that are commonly used in intrusion detection systems with a special emphasis on modern hardware platforms such as FPGA, GPU, many-core processors  ...  In addition, we provide a comparison between the classified detection approaches based on essential criteria such as definition, update process, detection ability, features of the system, and implementation  ...  CONCLUSION The application of hardware for intrusion detection systems has become an active area of research with the support of the modern powerful hardware devices such as FPGA, ASIC, Multicore processor  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/lisat.2016.7494100">doi:10.1109/lisat.2016.7494100</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/z2a5na5margvvhybu7qpy4yaqm">fatcat:z2a5na5margvvhybu7qpy4yaqm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180723113211/https://scholarworks.bridgeport.edu/xmlui/bitstream/handle/123456789/1706/Network%20Intrusion%20Detection%20Using%20Hardware.pdf;jsessionid=2913A5512613320A48ADCE5094357A64?sequence=6" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/b8/59/b859a181b9b7205e05f969ccc617446b7a9c12cd.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/lisat.2016.7494100"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Efficient reconfigurable architectures for 3D medical image compression

Afandi Ahmad, Abbes Amira
<span title="">2009</span> <i title="IEEE"> 2009 International Conference on Field-Programmable Technology </i> &nbsp;
Reconfigurable hardware, in the form of field programmable gate arrays (FPGAs) has been proposed as viable system building block in the construction of high-performance systems at an economical price.  ...  Moreover, in order to obtain efficient solutions for large medical volumes data, an efficient implementation of these operations is of significant importance.  ...  hardware using FPGAs.Table 1.2: Comparison of different implementation approaches.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/fpt.2009.5377682">doi:10.1109/fpt.2009.5377682</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/uynxh2ce2rfqtoiktcqqqcnyie">fatcat:uynxh2ce2rfqtoiktcqqqcnyie</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808235346/http://eprints.uthm.edu.my/2690/1/AFANDI_AHMAD_1.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/97/6a/976a0c13682902302fe9baf6b3cebdd3ea1a22dc.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/fpt.2009.5377682"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Hardware Countermeasures against Power Analysis Attacks: a Survey from Past to Present

Rafael Soares, Vitor Lima, Rodrigo Lellis, Plínio Finkenauer Jr., Vinícius Camargo
<span title="2021-08-18">2021</span> <i title="Journal of Integrated Circuits and Systems"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/jsqdmp6uz5ephoqg2attrgm3xi" style="color: black;">Journal of Integrated Circuits and Systems</a> </i> &nbsp;
Modern cryptographic circuits are increasingly demanding security requirements. Since its invention, power analysis attacks are a threat to the security of such circuits.  ...  In order to contribute to the design of secure circuits, designers may employ countermeasures in different abstraction levels.  ...  ACKNOWLEDGEMENTS This study was financed in part by the Coordenação de Aperfeiçoamento de Pessoal de Nível Superior -Brasil (CAPES) -Finance Code 001.  ... 
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Scaling Logic Locking Schemes to Multi-module Hardware Designs [chapter]

Dominik Šišejković, Farhad Merchant, Lennart M. Reimann, Rainer Leupers, Sascha Kegreiß
<span title="">2020</span> <i title="Springer International Publishing"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
The framework is tested and evaluated on a reallife 64-bit RISC-V core.  ...  in a realistic design flow.  ...  In the past years, a great variety of combinational locking schemes has been introduced, including locking strategies based on AND/OR, XOR/XNOR and MUX gates.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-030-52794-5_11">doi:10.1007/978-3-030-52794-5_11</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/bb2abv35gngklj466o55vh7ipi">fatcat:bb2abv35gngklj466o55vh7ipi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200904234323/https://link.springer.com/content/pdf/10.1007%2F978-3-030-52794-5_11.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/16/11/1611a6cc56e980793a1a8d2f91a9d27810d04078.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-030-52794-5_11"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

Countermeasures against Static Power Attacks

Thorben Moos, Amir Moradi
<span title="2021-07-09">2021</span> <i title="Universitatsbibliothek der Ruhr-Universitat Bochum"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/yz7ssmvstjhsxiwixprnmyijnq" style="color: black;">Transactions on Cryptographic Hardware and Embedded Systems</a> </i> &nbsp;
In recent years it has been demonstrated convincingly that the standby power of a CMOS chip reveals information about the internally stored and processed data.  ...  We believe that our elaborate comparison serves as a useful guideline for hardware designers to find a proper tradeoff between security and cost for almost any application.  ...  Acknowledgments The work described in this paper has been supported in part by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation) under Germany's Excellence Strategy -EXC 2092 CASA -  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.46586/tches.v2021.i3.780-805">doi:10.46586/tches.v2021.i3.780-805</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ijtafumtffghhinhss5oarvdia">fatcat:ijtafumtffghhinhss5oarvdia</a> </span>
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