A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
Filters
Neighbor-cell assisted error correction for MLC NAND flash memories
2014
The 2014 ACM international conference on Measurement and modeling of computer systems - SIGMETRICS '14
Preserved Fulltext
Based on our analyses, we propose a new method for correcting errors in a flash memory page, neighborcell assisted correction (NAC). ...
a neighbor cell value and use the re-read values to correct the cells that have neighbors with that value. ...
ACKNOWLEDGMENTS We thank the anonymous reviewers for helpful feedback. ...
doi:10.1145/2591971.2591994
dblp:conf/sigmetrics/CaiYMHUCM14
fatcat:ol5i3wjmozefjmdiy6rkjhiizq
Neighbor-cell assisted error correction for MLC NAND flash memories
2014
Performance Evaluation Review
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
Based on our analyses, we propose a new method for correcting errors in a flash memory page, neighborcell assisted correction (NAC). ...
a neighbor cell value and use the re-read values to correct the cells that have neighbors with that value. ...
ACKNOWLEDGMENTS We thank the anonymous reviewers for helpful feedback. ...
doi:10.1145/2637364.2591994
fatcat:y6okwyliyfa4td2zvgknyb565e
Architectural Techniques for Improving NAND Flash Memory Reliability
[article]
2018
arXiv
pre-print
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
We aim to improve flash reliability with a multitude of low-cost architectural techniques. ...
Raw bit errors are common in NAND flash memory and will increase in the future. These errors reduce flash reliability and limit the lifetime of a flash memory device. ...
Early MLC flash memories used oneshot programming, where both the LSB and MSB pages of a wordline are programmed at the same time. ...
arXiv:1808.04016v1
fatcat:fotned4yajc2xmaoezwjdrgypu
Flash-Based Security Primitives: Evolution, Challenges and Future Directions
2021
Cryptography
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2021; you can also visit the original URL.
The file type is application/pdf.
Flash memory has been given a spotlight in recent years, with the question of whether or not it can prove useful in a security role. ...
Because of inherent process variation in the characteristics of flash memory modules, they can provide a unique fingerprint for a device and have thus been proposed as locations for hardware security primitives ...
In an effort to reduce the cell-to-cell programming interference in flash memory, designers employ a unique two-step programming sequence that separates the programming of the LSB and MSB of MLC flash ...
doi:10.3390/cryptography5010007
fatcat:27qvp3ovzjhvtpo6aks5sgvquq
Design, Validation and Correlation of Characterized SODIMM Modules Supporting DDR3 Memory Interface
2013
IOSR Journal of Electronics and Communication Engineering
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2014; you can also visit the original URL.
The file type is application/pdf.
In any computing environment, it is necessary for the processor to have fast accessible RAM that allows temporary storage of data. ...
DDR3-SODIMM module is a key component in the memory interface and is becoming increasingly important in enabling higher speeds. ...
On the other hand, multi-level per cell (MLC) technology enabling a memory cell to store more than 1 bit has been developed to increase the storage density of NAND flash memory. ...
doi:10.9790/2834-0650111
fatcat:5forrex6lbdxhc7rnkzevdrawy
A (Nearly) Free Lunch:Extending NAND Flash Lifetime by Exploiting Neglected Physical Properties
2014
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2019; you can also visit the original URL.
The file type is application/pdf.
David Novo for his invaluable support. Thank you David for all these week-ends and nights spent on improving the writing and flow of my papers. You taught me a lot. ...
I would also like to thank my thesis committee: Prof. Babak Falsafi, Prof. Peter Desnoyers, and Prof. Sam H. Noh, for their insightful comments and feedback. My sincere thanks also goes to Dr. ...
Acknowledgements First of all I would like to express my sincere gratitude to my advisor Prof. Paolo Ienne for his patience, enthusiasm, guidance, and continuous support. ...
doi:10.5075/epfl-thesis-6388
fatcat:jhprzsk4onailhbsjwlsselxna
Flash-aware Database Management Systems
2020
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
In other words, FTL creates a black-box over Flash memory and emulates the behavior of HDDs. ...
FTL is a set of Flash management tasks that typically run on device and mask the native behavior of Flash memory. ...
Thus, for instance, some manufactures produce MLC Flash chips with four Flash pages per wordline: two LSB pages (LSB-odd, LSB-even) and two MSB pages (MSB-odd, MSB-even). ...
doi:10.25534/tuprints-00014476
fatcat:bhbbyleitnb6vhywjbf7khdp7q
Writing on Dirty Memory
2018
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit the original URL.
The file type is application/pdf.
The idea of coding techniques for memory with stuck-at defects is employed to handle critical problems of flash memories and resistive memories. ...
For 2D planar flash memories, we propose a coding scheme that combats the ICI, which is a primary challenge of 2D planar flash memories. ...
In 2 bits per cell flash memories, the least significant bit (LSB) and most significant bit (MSB) are mapped to two separate pages: LSB page and MSB page. ...
doi:10.1184/r1/6724286
fatcat:o4gv5lt3gngvbh42mrk3h6lt6i