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Distributed parallel scheduling algorithms for high-speed virtual output queuing switches

Lotfi Mhamdi, Mounir Hamdi
2009 2009 IEEE Symposium on Computers and Communications  
This paper presents a novel scalable switching architecture for input queued switches with its proper arbitration algorithms.  ...  We show that a pipeline pattern can be used to increase the efficiency of the scheduling scheme with scheduling algorithms running in parallel on all the separate scheduling devices.  ...  Abstract-This paper presents a novel scalable switching architecture for input queued switches with its proper arbitration algorithms.  ... 
doi:10.1109/iscc.2009.5202264 dblp:conf/iscc/MhamdiH09 fatcat:iujfnvpl5jfcxn4ggvz2qetc44

A Multicast FCFS Output Queued Switch without Speedup [chapter]

Maurizio A. Bonuccelli, Alessandro Urpi
2002 Lecture Notes in Computer Science  
In this paper we propose an architecture for an output queued switch based on the mesh of trees topology.  ...  After establishing the equivalence of our proposal with the output queued model, we analyze its features, showing that it merges positive features of the input queued switches (specially their implementability  ...  The former is the implementation of the very simple idea that every cell, at the arrival to the switch, should be immediately buffered (with a queue for every input), and then a scheduler will choose in  ... 
doi:10.1007/3-540-47906-6_86 fatcat:nsleohjui5ah7ahanm6677ri2y

A near optimal scheduler for switch-memory-switch routers

Adnan Aziz, Amit Prakash, Vijaya Ramachandra
2003 Proceedings of the fifteenth annual ACM symposium on Parallel algorithms and architectures - SPAA '03  
We present a simple and near optimal randomized parallel scheduling algorithm for scheduling packets in routers based on the Switch-Memory-Switch (SMS) architecture, which emulates 'output queuing' by  ...  Specifically, for a router with inputs and outputs, our algorithm computes the schedule in where a round is a communication of a few bits between input ports and memory together with simple local computation  ...  Note that in general, an output queued switch will use a conservative value for a to allow for occasional bursts of traffic for a single output.  ... 
doi:10.1145/777412.777472 dblp:conf/spaa/AzizPR03 fatcat:fry7s7qyozfj7iivmphkgxsxc4

A near optimal scheduler for switch-memory-switch routers

Adnan Aziz, Amit Prakash, Vijaya Ramachandra
2003 Proceedings of the fifteenth annual ACM symposium on Parallel algorithms and architectures - SPAA '03  
We present a simple and near optimal randomized parallel scheduling algorithm for scheduling packets in routers based on the Switch-Memory-Switch (SMS) architecture, which emulates 'output queuing' by  ...  Specifically, for a router with inputs and outputs, our algorithm computes the schedule in where a round is a communication of a few bits between input ports and memory together with simple local computation  ...  Note that in general, an output queued switch will use a conservative value for a to allow for occasional bursts of traffic for a single output.  ... 
doi:10.1145/777470.777472 fatcat:av4kwlby3re6xptymtjvfhyvlm

A low complexity scheduling algorithm for a crosspoint buffered switch with 100% throughput

Yanming Shen, Shivendra S. Panwar, H. Jonathan Chao
2008 2008 International Conference on High Performance Switching and Routing  
We also present a novel queuing model that models crosspoint butTered switches under uniform traffic.  ...  Crosspoint butTered switches are emerging as the focus of research in high-speed routers. They have simpler scheduling algorithms, and achieve better performance than a bufferless crossbar switch.  ...  Indeed, even a simple round-robin scheduler has a delay performance close to an output queued switch [6] .  ... 
doi:10.1109/hspr.2008.4734442 fatcat:llwseqvsd5h7dkr6ibnmvftg3e

D-LQF: An Efficient Distributed Scheduling Algorithm for Input-Queued Switches

Chunzhi He, Kwan L. Yeung
2011 2011 IEEE International Conference on Communications (ICC)  
Iterative scheduling algorithms are attractive in finding a maximal size matching for an input-queued switch.  ...  This calls for a pipelined implementation of a single-iteration scheduling algorithm.  ...  The scheduling problem in an input-queued switch is equivalent to the matching problem in a bipartite graph.  ... 
doi:10.1109/icc.2011.5962553 dblp:conf/icc/HeY11 fatcat:loowcyhc7bh7lp2rewfx7lyyuy

Providing 100% Throughput in a Buffered Crossbar Switch

Yanming Shen, Shivendra S. Panwar, H. Jonathan Chao
2007 2007 Workshop on High Performance Switching and Routing  
The proposed scheme is called SQUISH: a Stable Queue Input-output Scheduler with Hamiltonian walk.  ...  Our simulation results also show good delay performance for SQUISH.  ...  Indeed, even a simple round-robin scheduler has a delay performance close to an output queued switch [18] .  ... 
doi:10.1109/hpsr.2007.4281262 fatcat:ksughwvaarcztbg24rkxd253xe

A Scalable Approach for Supporting Streaming Media: Design, Implementation and Experiments

D. Agrawal, M. Baldi, M. Corra, G. Fontana, G. Marchetto, V. T. Nguyen, Y. Ofek, D. Severina, T. H. Truong, O. Zadedyurina
2007 Proceedings of the IEEE Symposium on Computers and Communications  
Consequently, the switch realized is very simple, scalable to 10-100 terabits per second in a single chassis, and suitable for all optical implementation.  ...  In order to achieve scalable IP packet switching it is essential to minimize "stopping" of the serial bit streams, in order to minimize: buffer size, jitter and loss.  ...  Scheduling through a switching fabric is based on a pre-defined schedule, which enables the implementation of a simple controller.  ... 
doi:10.1109/iscc.2007.4381589 dblp:conf/iscc/AgrawalBCFMNOSTZ07 fatcat:6y7vz5kjirhlnjfiyhv37aec7e

Deficit round-robin scheduling for input-queued switches

Xiao Zhang, L.N. Bhuyan
2003 IEEE Journal on Selected Areas in Communications  
In this paper, we address the problem of fair scheduling of packets in Internet routers with input-queued switches.  ...  Index Terms- Fair scheduling, input-queued crossbar switch, quality of service. § ¦ © g ¦ © slots, decrease (if ¤ Xiao Zhang (S'01) received the B.E. degree in com-  ...  In the following section, we develop such a flow-based scheduler for the switch and use simple FIFO output queues. IV.  ... 
doi:10.1109/jsac.2003.810495 fatcat:bvedspn4tje6zfnt4opmv4ans4

Packet Scheduling in a Low-Latency Optical Interconnect With Electronic Buffers

Lin Liu, Zhenghao Zhang, Yuanyuan Yang
2012 Journal of Lightwave Technology  
To relax the time constraint on computing a schedule and improve system throughput, we further propose a mechanism to pipeline packet scheduling in the OpCut switch by distributing the scheduling task  ...  Our simulation results show that the OpCut switch with the proposed scheduling algorithms achieve close performance to the ideal output-queued (OQ) switch in terms of packet latency, and that the pipelined  ...  There has been a lot research on scheduling algorithms in packet switches. One of the most extensively studied topics is packet scheduling algorithms for the input-queued (IQ) switch.  ... 
doi:10.1109/jlt.2012.2190971 fatcat:fkafnghhvnfd3kbwcjufvmkjfm

High-Speed Multicast Scheduling for All-Optical Packet Switches

Zhiyang Guo, Yuanyuan Yang
2013 2013 IEEE Eighth International Conference on Networking, Architecture and Storage  
To relax the time constraint of DGMS, we further propose a pipelining technique that distributes the scheduling tasks among a sequence of sub-schedulers.  ...  We then present a Delay-Guaranteed Multicast Scheduling (DGMS) algorithm that considers the schedule of each arriving packet for multiple time slots.  ...  The results for FIFO scheduling on the output queued multicast switch (OQ-FIFO) are also presented as a performance benchmark.  ... 
doi:10.1109/nas.2013.26 dblp:conf/nas/GuoY13 fatcat:bbapmuvkqrfzfas5c5xrtcll7e

A Resource Pooling Switch Architecture with High Performance Scheduler [article]

Jiong Du, Fei Hu, Du Xu
2018 arXiv   pre-print
As all network functions are instantiated by the resources connected to the switching fabric and constructed in the form of Service Function Chains (SFC), the traffic patterns changed a lot.  ...  In this paper, we propose a novel data plane structure called Resource Pooling Switch Architecture (RPSA), which utilizes global shared resource pool to provide different processing functionalities and  ...  Aiming at input-queued switch, there exist some classic scheduling algorithms like iSLIP [14] and FIRM [8] and many other recent studies.  ... 
arXiv:1804.10784v1 fatcat:kqp4wk3zbzgvdhrdzqxhtkgwum

Fair and Smooth Scheduling for Virtual Output Queuing Switches Achieving 100% Throughput [chapter]

Min Song, Sachin Shetty, Wu Li
2005 Lecture Notes in Computer Science  
Cell scheduling has received extensive attention. Most recent studies, however, focus on achieving a 100% switch throughput under the uniform arrivals.  ...  This paper presents a new scheduling algorithm, Worst-case Iterative Longest Port First (WiLPF), which improves the performance of the well-known scheduler Iterative Longest Port First (iLPF) such that  ...  Introduction Due to the high price of output queuing switches and the low throughput of input queuing switches, modern switches mostly deploy virtual output queuing (VOQ) [3] [4] [6] technique.  ... 
doi:10.1007/11534310_44 fatcat:bvhb6sgjizgmbbykthgwy3uiue

HIPIQS: a high-performance switch architecture using input queuing

R. Sivaram, C.B. Stunkel, D.K. Panda
2002 IEEE Transactions on Parallel and Distributed Systems  
In this paper we present a new input queue-based switch architecture called HIPIQS (HIgh-Performance Input-Queued Switch).  ...  It offers low latency for a range of message sizes, and provides throughput comparable to that of output queuing approaches. Furthermore, it allows simple and distributed arbitration.  ...  In this paper, we present the architecture of such a switch-HIPIQS (HIgh-Performance Input-Queued Switch)-which uses input queuing, pipelined multi-queue input buffers [9] , cutthrough switching, and  ... 
doi:10.1109/71.993207 fatcat:impdny74sff3fnzbrwewcsvnaq

Trade-offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip [chapter]

E. Rijpkema, K. G. W. Goossens, A. Rădulescu, J. Dielissen, J. van Meerbergen, P. Wielage, E. Waterlander
2008 Design, Automation, and Test in Europe  
Our reasoning for the trade offs is validated with a prototype router implementation. We show a lay-out of an inputqueued wormhole 5 × 5 router with an aggregate bandwidth of 80 Gbit/s.  ...  For the communication, scalable and compositional interconnects, such as networks on chip (NoC), must be used.  ...  Matrix scheduling The switch matrix, present in input queued architectures, is controlled by a contention resolution algorithm, known as matrix scheduling, to properly connects inputs to outputs.  ... 
doi:10.1007/978-1-4020-6488-3_10 fatcat:h6sl7vjenzb2dowx3zfmvnkuoe
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