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Thermal-Aware Scheduling in Green Data Centers

Muhammad Tayyab Chaudhry, Teck Chaw Ling, Atif Manzoor, Syed Asad Hussain, Jongwon Kim
2015 ACM Computing Surveys  
A survey is presented henceforth of thermal-ware scheduling and associated techniques for green data centers.  ...  Servers in data centers require a constant supply of cold air from on-site cooling mechanisms for reliability.  ...  The QoS assurance for a thermalaware scheduler also depends on the reactive/proactive nature of the scheduler. The reactive scheduler may undergo poor QoS due to frequent thermal anomalies.  ... 
doi:10.1145/2678278 fatcat:5dura2qnujbvbdfi3f3oimkeiu

Recent thermal management techniques for microprocessors

Joonho Kong, Sung Woo Chung, Kevin Skadron
2012 ACM Computing Surveys  
Floorplanning covers a range of thermal-aware floorplanning techniques for 2D and 3D microprocessors.  ...  Temperature monitoring − a requirement for dynamic thermal management (DTM) − includes temperature estimation and sensor placement techniques for accurate temperature measurement or estimation.  ...  ACKNOWLEDGMENTS This survey work was supported in part by a grant from the US NSF under grant number CRI-0551630, a grant from Intel Research, and the Korea Science and Engineering Foundation (KOSEF) grant  ... 
doi:10.1145/2187671.2187675 fatcat:bsvvqax2rbftxivi555mzzc7uy

REFLIX: a processor core with native support for control-dominated embedded applications

Zoran Salcic, Partha Roop, Morteza Biglari-Abhari, Abbas Bigdeli
2004 Microprocessors and microsystems  
We propose a microprocessor architecture that has native Esterel-like support for reactivity, flexibility of using programs and design styles as used in Esterel programming language for reactive embedded  ...  Efficient and reliable interaction with the environment (reactivity) is a key feature for many embedded system applications.  ...  support for reactivity, and also verified using formal methods.  ... 
doi:10.1016/j.micpro.2003.08.001 fatcat:am2yhjxjjzfhli5rj4wzb6qyxe

Optimizations for a simulator construction system supporting reusable components

David A. Penry, David I. August
2003 Proceedings of the 40th conference on Design automation - DAC '03  
Exploring a large portion of the microprocessor design space requires the rapid development of efficient simulators.  ...  The choice of a specific model of computation has two significant effects: 1 A discussion of why these characteristics are necessary can be found in [10] .  ...  ACKNOWLEDGEMENTS We would like to thank Manish Vachharajani, Neil Vachharajani, and the anonymous reviewers for their insightful comments.  ... 
doi:10.1145/775832.776065 dblp:conf/dac/PenryA03 fatcat:nvo7nimafzhkbbvp2nb7rwo6he

Optimizations for a simulator construction system supporting reusable components

David A. Penry, David I. August
2003 Proceedings of the 40th conference on Design automation - DAC '03  
Exploring a large portion of the microprocessor design space requires the rapid development of efficient simulators.  ...  The choice of a specific model of computation has two significant effects: 1 A discussion of why these characteristics are necessary can be found in [10] .  ...  ACKNOWLEDGEMENTS We would like to thank Manish Vachharajani, Neil Vachharajani, and the anonymous reviewers for their insightful comments.  ... 
doi:10.1145/776063.776065 fatcat:o64zorhp7nc7xh5hdgl4lvgmxm

Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm

Ernesto Martins, Paulo Neves, José Fonseca
2002 Microprocessors and microsystems  
In this paper a preliminary implementation of a hardware scheduling coprocessor based on the planning paradigm is presented.  ...  The use of a centralised planning scheduler in ®eldbus-based systems requiring real-time operation has proved to be a good compromise between operational¯exibility and timeliness guarantees.  ...  When a VPT unit raises a request for allocation, its chain signal output is deactivated.  ... 
doi:10.1016/s0141-9331(01)00149-1 fatcat:m467fvx2jfc5pjaf2535xhz37a

Asynchrnous Architecture for Sensor Network Nodes [chapter]

Aurélien Buhrig, Marc Renaudin, Dominique Barthel
2006 IFIP International Federation for Information Processing  
The software part that is executed on an asynchronous processor is then scheduled using a quasi-static scheduling and operates in an event-driven way with reactive hardware through an interface controller  ...  We present an asynchronous software and hardware architecture specifically suited for wireless sensor network nodes.  ...  ACKNOWLEDGMENT This work is partially supported by France-Telecom R&D department.  ... 
doi:10.1007/0-387-31173-4_30 fatcat:gter464f7rfm3bbyd7swclkbkq

HybDTM: a coordinated hardware-software approach for dynamic thermal management

A. Kumar, Li Shang, Li-Shiuan Peh, N.K. Jha
2006 Proceedings - Design Automation Conference  
While past works on DTM have focused on different techniques in isolation, they fail to consider a synergistic mechanism using both hardware and software support and hence lead to a significant execution  ...  process scheduling, synergistically leveraging the advantages of both approaches.  ...  We also implemented our fine-grained hybrid DTM policy inside the kernel for providing software directives to the scheduler for scheduling processes in a thermal-aware fashion as well as hardware directives  ... 
doi:10.1109/dac.2006.229219 fatcat:xvimcawbgfc6ddgsj5d6sstloe

HybDTM

Amit Kumar, Li Shang, Li-Shiuan Peh, Niraj K. Jha
2006 Proceedings of the 43rd annual conference on Design automation - DAC '06  
While past works on DTM have focused on different techniques in isolation, they fail to consider a synergistic mechanism using both hardware and software support and hence lead to a significant execution  ...  process scheduling, synergistically leveraging the advantages of both approaches.  ...  We also implemented our fine-grained hybrid DTM policy inside the kernel for providing software directives to the scheduler for scheduling processes in a thermal-aware fashion as well as hardware directives  ... 
doi:10.1145/1146909.1147052 dblp:conf/dac/KumarSPJ06 fatcat:nt6jcmgvffdm3i2pls2ikls5bm

STARPro — A new multithreaded direct execution platform for Esterel

Simon Yuan, Sidharta Andalam, Li Hsien Yoong, Partha S. Roop, Zoran Salcic
2009 Electronical Notes in Theoretical Computer Science  
STARPro manages Esterel threads and their scheduling, and also features a hardware preemption unit to assist the handling of the abort constructs in Esterel.  ...  The proposed architecture, called STARPro, is a pipelined, multithreaded, reactive processor that provides native support for the direct execution of Esterel.  ...  Acknowledgement The authors would like to acknowledge the assistance of Rohan Aggrawal in STARPro's implementation, and Chia-Hao Chou for his contribution to the design.  ... 
doi:10.1016/j.entcs.2008.01.005 fatcat:nv34m2aabzba3eer3fm5xamywu

The InfoPad multimedia terminal: a portable device for wireless information access

T.E. Truman, T. Pering, R. Doering, R.W. Brodersen
1998 IEEE transactions on computers  
The architecture of a device that is optimized for wireless information access and display of multimedia data is substantially different than configurations designed for portable stand-alone operation.  ...  A limiting case is when the only computation that is provided in the portable terminal supports the wireless links or the I/O interfaces, and it is this extreme position that is explored in the InfoPad  ...  ACKNOWLEDGMENTS This work was supported by DARPA contract J-FBI-93-153.  ... 
doi:10.1109/12.729791 fatcat:n7xkrcrtzzb5vhwgpuauygfwyy

Co-synthesis and co-simulation of control-dominated embedded systems

Alessandro Balboni, William Fornaciari, Donatella Sciuto
1996 Design automation for embedded systems  
This paper presents a methodology for hardware/software co-design with particular emphasis on the problems related to the concurrent simulation and synthesis of hardware and software parts of the overall  ...  The proposed approach aims at overcoming the problem of having two separate simulation environments by defining a VHDL-based modeling strategy for software execution, thus enabling the simulation of hardware  ...  for software-bound architectural units, including the Operating System support.  ... 
doi:10.1007/bf00133305 fatcat:i5yb6xbdyfevrfd4hqudpjxbv4

Low Power Operating System for Heterogeneous Wireless Communication System [chapter]

Suet-Fei Li, Roy Sutton, Jan Rabaey
2003 Compilers and Operating Systems for Low Power  
More efficient solutions are obtained with OS's that are developed to exploit the reactive event-driven nature of the domain and have built-in aggressive power management.  ...  To achieve further efficiency, we propose extensions to the event-driven OS paradigm to support power management at the system behavior, system architecture, and architecture module level.  ...  Traditional software centric control approaches have a central control unit that schedules communication between the system modules.  ... 
doi:10.1007/978-1-4419-9292-5_1 fatcat:ryo6dcbv7nbhnm73euw4j7sxuu

TrueFlex: A flexible and efficient evaluation platform for networked automotive systems

Seyed Ali Marashi, Ali Jahanian
2012 20th Iranian Conference on Electrical Engineering (ICEE2012)  
In this paper, we propose a TrueTime-based networked automotive platform (TrueFlex) which enables modeling and simulation of processing units, operating system kernels, communication bus and sensors/actuators  ...  This platform is implemented and evaluated in this paper to show its very useful capabilities for automotive electronic designers.  ...  Moreover, TrueTime supports a verity of scheduling policies for task execution. We report response time, execution time, release latency and start latency parameters for each job of nodes' tasks.  ... 
doi:10.1109/iraniancee.2012.6292434 fatcat:emfqpt2k2zeovgt3vuzl26drfi

Towards direct execution of esterel programs on reactive processors

Partha S. Roop, Zoran Salcic, M.W. Sajeewa Dayaratne
2004 Proceedings of the fourth ACM international conference on Embedded software - EMSOFT '04  
This paper describes a reactive microcontroller called RePIC that has native support for reactive features of the language.  ...  Limited support for concurrent Esterel programs is demonstrated through a dual-processor RePIC architecture.  ...  CONCLUSIONS This paper presents a new approach for the support of Esterel execution on a microprocessor while preserving most of the semantics of the language.  ... 
doi:10.1145/1017753.1017793 dblp:conf/emsoft/RoopSD04 fatcat:iivy6sktj5gy3jk4q4r2c47sfi
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