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The Multi-Program Performance Model: Debunking current practice in multi-core simulation

Kenzo Van Craeynest, Lieven Eeckhout
2011 2011 IEEE International Symposium on Workload Characterization (IISWC)  
Because MPPM involves analytical modeling, it is very fast, and it estimates multi-core performance for a very large number of multi-program workloads in a reasonable amount of time.  ...  This paper presents the Multi-Program Performance Model (MPPM), a method for quickly estimating multiprogram multi-core performance based on single-core simulation runs.  ...  Kenzo Van Craeynest is supported through a doctoral fellowship by the Agency for Innovation by Science and Technology (IWT).  ... 
doi:10.1109/iiswc.2011.6114194 dblp:conf/iiswc/CraeynestE11 fatcat:vvnd5mwftzcxtbaoh77qc4z6ka

Research on the Embedded Heterogeneous Multi-core Design Method for 100GbE Network Processor

Xiangyun Zeng, Lianfeng Zhao, Dong Bian
2012 Procedia Engineering  
We proposed a design method of heterogeneous multi-core processor on chip.  ...  The design method of heterogeneous multi-core processor means that the core types, core numbers, and core interconnections varied along with the various applications.  ...  Design method of the multi-core processor[1][2] on chip overview Multi-core processor instruction set Dynamic instruction set: several heterogeneous core architectures are integrated on a chip, and different  ... 
doi:10.1016/j.proeng.2012.01.007 fatcat:zkwt34dznjbe3euwchnpi3cebe

The Case for Message Passing on Many-Core Chips [chapter]

Rakesh Kumar, Timothy G. Mattson, Gilles Pokam, Rob Van Der Wijngaart
2010 Multiprocessor System-on-Chip  
the data needed, and completing and reviewing the collection of information.  ...  Directorate for information Operations and Reports, 1215 Jefferson Davis Hiahwav Suite 1204 Artinqton, VA 22202-4302, and to the Office of Management and Budget, Paperwork Reduction Project (0704-0188)  ...  The programming models for multi-core architectures should also be capable of adapting to and exploiting asymmetry (by design and accident) in processing cores.  ... 
doi:10.1007/978-1-4419-6460-1_5 fatcat:dtilxwuw7vcd5ecgrkc5ptzw2y

Towards an Intelligent Environment for Programming Multi-core Computing Systems [chapter]

Sabri Pllana, Siegfried Benkner, Eduard Mehofer, Lasse Natvig, Fatos Xhafa
2009 Lecture Notes in Computer Science  
In this position paper we argue that an intelligent program development environment that proactively supports the user helps a mainstream programmer to overcome the difficulties of programming multi-core  ...  The programming environment supports program composition in a model-driven development fashion using parallel building blocks and proactively assists the user during major phases of program development  ...  Intelligent Programming of Multi-core Systems In this section we outline our methodology and the corresponding environment for programming multi-core systems.  ... 
doi:10.1007/978-3-642-00955-6_19 fatcat:zeg7yekhhfhetedm6cqllkzsoe

Configurable SID-based multi-core simulators for embedded system education

Chung-Wen Huang, Wei-Kuan Shih, Yarsun Hsu, Jenq Kuen Lee
2009 Proceedings of the 2009 Workshop on Embedded Systems Education - WESS '09  
Embedded CourseWare: Multi-core Simulation Tools • With the emerging of multi-core designs for embedded systems, there is a need of multi-core simulation tools for courseware and class experiments. • Several  ...  for a variety of experiments and lab modules with embedded multi-core topics.  ...  Embedded Software Consortium Layers of Simulation Models Workshop on Embedded Systems Education, 2009  ... 
doi:10.1145/1719010.1719021 fatcat:ebo4ymvqdbbknj7klhakohhwye

Multi-DaC programming model

Abdorreza Savadi, Morteza Moradi, Hossein Deldari
2012 Proceedings of the 7th workshop on Declarative aspects and applications of multicore programming - DAMP '12  
In this paper, we have attempted to make a mapping between DaC tree and the Memory Hierarchy (MH) of multi-core processor. Multi-BSP model inspired us to introduce Multi-DaC programming model.  ...  Computational models such as Multi-BSP, illustrate these parameters and explain adequate methods for designing algorithms on multi-cores.  ...  Acknowledgments The two first authors of this paper share the same role in preparing the paper.  ... 
doi:10.1145/2103736.2103743 dblp:conf/popl/SavadiMD12 fatcat:j277nqpjbjblpdciamwx7ekdwq

WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach

Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clement David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou (+8 others)
2017 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017  
The ARGO H2020 project 1 provides a programming paradigm and associated tool flow to exploit the full potential of architectures in terms of development productivity, time-to-market, exploitation of the  ...  In this paper we give an overview of the objectives of ARGO and explore the challenges introduced by our approach.  ...  The ARGO approach aims at offering an enabling technology to use multi-and many-core systems in a model-based design workflow for real-time application. B.  ... 
doi:10.23919/date.2017.7927000 dblp:conf/date/DerrienPABBDDDF17 fatcat:7d3ac4uwwrb6llwboieuajjuqu

Software Development for Parallel and Multi-Core Processing [chapter]

Kenn R.
2012 Embedded Systems - High Performance Systems, Applications and Projects  
 Lack of parallel programming experience by the software community.  Lack of parallel programming models to support these multi-core processors.  An abundance of differentiated multi-core processors  ...  Hence, it offers the easiest and quickest path for porting legacy code from single core designs to multi-core designs.  ...  Software Development for Parallel and Multi-Core Processing, Embedded Systems -High Performance Systems, Applications and Projects, Dr.  ... 
doi:10.5772/38261 fatcat:3zwgizqp3vgqfa2hn6gyxmuw44

Integrated research of parallel computing: Status and future

GuoLiang Chen, GuangZhong Sun, Yun Xu, Bai Long
2009 Science Bulletin  
In the past twenty years, the research group in University of Science and Technology of China has developed an integrated research method for parallel computing, which is a combination of "Architecture-Algorithm-Programming-Application  ...  In this paper, we survey the current status of integrated research method for parallel computing and by combining the impact of multi-core systems, cloud computing and personal high performance computer  ...  How to model and calculate the new multi-core systems have become a very interesting research topic.  ... 
doi:10.1007/s11434-009-0261-9 fatcat:hb6o67exqfhcrakn7r46t6ifme

Adaptive Scheduling Framework for Multi - Core Systems Based on the Task - Parallel Programming Model

H. M. LU, School of Computer Science and Engineering, Changchun University of Technology, Changchun 1 30012 , China, Y. J. CAO, J. J. SONG, T. Y. DI, H. Y. SUN, X. M. HAN, School of Software , Zhengzhou University, Zhengzhou 450 000, China, School of Computer Science and Engineering, Changchun University of Technology, Changchun 1 30012 , China, School of Computer Science and Engineering, Changchun University of Technology, Changchun 1 30012 , China, School of Computer Engineering, Nanyang Technological Univers ity, Singapore 639798 , Singapore, School of Computer Science and Engineering, Changchun University of Technology, Changchun 1 30012 , China
2016 Journal of Engineering Science and Technology Review  
co-scheduling system A-SYS (Adaptive SYStem) based on fine-grained task programming model was designed and implemented.  ...  However, the most updated multi-core parallel programming models have defects, such as poor scalability and intensive competition in processor core resources.  ...  The data parallel programming model is designed mainly for large-scale data processing.  ... 
doi:10.25103/jestr.096.12 fatcat:h5vgipeojfdnnbxgkw6a6fdjba

Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design

Carlo Sau, Nicola Carta, Luigi Raffo, Francesca Palumbo
2015 Journal of Signal Processing Systems  
Applications, programming models, compilers, API designs, architecture designs, and software tools all need to contribute to the advance of embedded multi-core computing for signal processing, pixel processing  ...  For the third paper, BRapid Hybrid Simulation for Exploring the Design Space of Signal Processors with Dynamic and Scalable Timing Models [3]^, authored by Yeh et al., presents a rapid hybrid emulation  ...  Acknowledgements The work is supported in part by research grants from Taiwan MOST and Mediatek.  ... 
doi:10.1007/s11265-015-0999-z fatcat:acmbvgxxirfp3mb3zi7io3nqly

Editorial: enabling technologies for programming extreme scale systems

Ching-Hsien Hsu
2012 Journal of Supercomputing  
The emerging multi-core commodity processors and advanced networking technologies are allowing for the design of cost-effective parallel and distributed systems.  ...  Multi-core architecture presents a new trend, and core-based parallel processing algorithms will continue to become more important.  ...  The experiments show that the belief propagation method for stereo matching can be adapted from a single core program to a multi-core one for embedded MPSoC environments rapidly.  ... 
doi:10.1007/s11227-012-0745-2 fatcat:w74ggqhcibc27llbaq4nqe3oiq

Guest Editorial: Special Issue on Embedded Multicore Applications and Optimization

Yung-Chia Lin, Jenq-Kuen Lee, Francois Bodin
2019 Journal of Signal Processing Systems  
Applications, programming models, compilers, API designs, architecture designs, and software tools all need to contribute to the advance of embedded multi-core computing for signal processing, pixel processing  ...  For the third paper, BRapid Hybrid Simulation for Exploring the Design Space of Signal Processors with Dynamic and Scalable Timing Models [3]^, authored by Yeh et al., presents a rapid hybrid emulation  ...  Acknowledgements The work is supported in part by research grants from Taiwan MOST and Mediatek.  ... 
doi:10.1007/s11265-018-1431-2 fatcat:y5phhhhmpfeszgkihc5opdcate

Design, thru simulation, of a multiple-access information system

Louis R. Glinka, R. Michael Brush, Alan J. Ungar
1967 Proceedings of the November 14-16, 1967, fall joint computer conference on - AFIPS '67 (Fall)  
The task of formulating an appropriate system design in response to these requirements is greatly facilitated by a modeling and simulation pro-  ...  considerable attention. 1 -3 The research for proper hardware and software design solutions has been primarily directed at installations which would support a large and diverse group of users with varied  ...  Application programs The model reflects the assumed design of a generalized set of data storage and retrieval programs for the processing of all system jobs.  ... 
doi:10.1145/1465611.1465669 dblp:conf/afips/GlinkaBU67 fatcat:lxfi2z73azdkfnbwamqi5nzbqy

High-Performance Embedded Architecture and Compilation Roadmap [chapter]

Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Mike O'Boyle, Dionisios Pnevmatikatos, Alex Ramirez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam
2007 Lecture Notes in Computer Science  
The HiPEAC roadmap is organized around 10 central themes: (i) single core architecture, (ii) multi-core architecture, (iii) interconnection networks, (iv) programming models and tools, (v) compilation,  ...  One of the key deliverables of the EU HiPEAC FP6 Network of Excellence is a roadmap on high-performance embedded architecture and compilation -the HiPEAC Roadmap for short.  ...  Programming Models and Tools Exploiting the parallelism offered by a multi-core architecture requires powerful new programming models.  ... 
doi:10.1007/978-3-540-71528-3_2 fatcat:ywmebvj7wrfb3ojghsjs4w3fy4
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