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HRL: Efficient and flexible reconfigurable logic for near-data processing

Mingyu Gao, Christos Kozyrakis
2016 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)  
Towards this goal, NDP units based on fine-grained (FPGA) and coarse-grained (CGRA) reconfigurable logic have been proposed as a compromise between the efficiency of custom engines and the flexibility  ...  Unfortunately, FPGAs incur significant area overheads for bit-level reconfiguration, while CGRAs consume significant power in the interconnect and are inefficient for irregular data layouts and control  ...  The authors want to thank Raghu Prabhakar, Christina Delimitrou, and the anonymous reviewers for their insightful comments on earlier versions of this paper.  ... 
doi:10.1109/hpca.2016.7446059 dblp:conf/hpca/GaoK16 fatcat:46yt3s3vznd23ma4aaszp3jfdy

Software transparent dynamic binary translation for coarse-grain reconfigurable architectures

Matthew A. Watkins, Tony Nowatzki, Anthony Carno
2016 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)  
In this work we propose DORA, a Dynamic Optimizer for Reconfigurable Architectures, which achieves substantial (2X) power and performance improvements while having low hardware and insertion overhead and  ...  Course-grained reconfigurable architectures (CGRAs) are a class of architectures that provide a configurable grouping of functional units that aim to bridge the gap between the power and performance of  ...  ACKNOWLEDGMENTS We thank Karu Sankaralingam for his feedback as this work developed and for comments on draft versions of the paper.  ... 
doi:10.1109/hpca.2016.7446060 dblp:conf/hpca/WatkinsNC16 fatcat:ssmt2kzalba2xoozatcp6imlxq

A Survey of Coarse-Grained Reconfigurable Architecture and Design

Leibo Liu, Jianfeng Zhu, Zhaoshi Li, Yanan Lu, Yangdong Deng, Jie Han, Shouyi Yin, Shaojun Wei
2019 ACM Computing Surveys  
This article reviews the architecture and design of CGRAs thoroughly for the purpose of exploiting their full potential. First, a novel multidimensional taxonomy is proposed.  ...  As general-purpose processors have hit the power wall and chip fabrication cost escalates alarmingly, coarsegrained reconfigurable architectures (CGRAs) are attracting increasing interest from both academia  ...  For instance, a CGRA for cryptographic algorithms might contain fine-grained components.  ... 
doi:10.1145/3357375 fatcat:pqi4d33i6bg45a6llswhwd44qi

A Survey on Coarse-Grained Reconfigurable Architectures from a Performance Perspective [article]

Artur Podobas, Kentaro Sano, Satoshi Matsuoka
2020 arXiv   pre-print
Among the more salient and practical of the post-Moore alternatives are reconfigurable systems, with Coarse-Grained Reconfigurable Architectures (CGRAs) seemingly capable of striking a balance between  ...  We find that there are ample opportunities for future research on CGRAs, in particular with respect to size, functionality, support for parallel programming models, and to evaluate more complex applications  ...  ACKNOWLEDGEMENTS This article is based on results obtained from a project commissioned by the New energy and Industrial Technology Development Organization (NEDO).  ... 
arXiv:2004.04509v1 fatcat:sxnq32chxjf6hfc5ygjsxqjwl4

A Survey on Coarse-Grained Reconfigurable Architectures from a Performance Perspective

Artur Podobas, Kentaro Sano, Satoshi Matsuoka
2020 IEEE Access  
recent research has shown performance-or power-benefits for multiple applications [10]-[14].  ...  These limitations have been recognized for decades (e.g., [15]-[17]), and have driven forth a different branch of reconfigurable architecture: the Coarse-Grained Reconfigurable Architecture (CGRAs).  ...  ACKNOWLEDGMENT The authors would like to thank the anonymous reviewers who have helped improving this survey paper.  ... 
doi:10.1109/access.2020.3012084 fatcat:xx6k4lxbjbc4tjebbymp42w634

Similarity-Aware Architecture/Compiler Co-Designed Context-Reduction Framework for Modulo-Scheduled CGRA

Zhongyuan Zhao, Weiguang Sheng, Jinchao Li, Pengfei Ye, Qin Wang, Zhigang Mao
2021 Electronics  
However, these CGRAs need frequent reconfiguration during their execution, which makes them suffer from large area and power overhead for context memory and context-fetching.  ...  Modulo-scheduled coarse-grained reconfigurable array (CGRA) processors have shown their potential for exploiting loop-level parallelism at high energy efficiency.  ...  Acknowledgments: The authors want to thank the anonymous reviewers for their constructive comments on this paper. Conflicts of Interest: The authors declare no conflict of interest.  ... 
doi:10.3390/electronics10182210 fatcat:52pyrrro5nfaxhkge3774ltase

Creating Customized CGRAs for Scientific Applications

George Charitopoulos, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos
2021 Electronics  
We offer analysis metrics from various scientific applications and tailor the results that are to be used by MC-Def, a novel Mixed-CGRA Definition Framework targeting a Mixed-CGRA architecture that leverages  ...  the advantages of CGRAs and those of FPGAs by utilizing a customized cell-array along, with a separate LUT array being used for adaptability.  ...  All authors have read and agreed to the published version of the manuscript.  ... 
doi:10.3390/electronics10040445 fatcat:uc33xobotvg45cpf6xsqi4t4hy

Survey on Coarse Grained Reconfigurable Architectures

Vaishali Tehre, Ravindra Kshirsagar
2012 International Journal of Computer Applications  
Hence a lot of research is going on to implement CGRA in SOC because Coarse-grained reconfigurable architecture can provide both performance and flexibility.  ...  Novel system on chip architectures should be able to execute multiple performances demanding applications while maintaining low power consumption, small area, nonrecurring engineering costs and short time  ...  Low power consumptions is an important criteria for biosignal processing device. Hence more importance is given to low power consumption rather than performance while designing this architecture.  ... 
doi:10.5120/7429-0104 fatcat:nb5kpk3ja5g2dlilbeudebl77a

A Survey on Reconfigurable System-on-Chips

Hung Kiem Nguyen, Tu Xuan Tran
2018 REV Journal on Electronics and Communications  
The requirements for high performance and low power consumption are becoming more and more inevitable when designing modern embedded systems, especially for the next generation multi-mode multimedia or  ...  The unique characteristic of such systems is integration of many types of heterogeneous reconfigurable processing fabrics based on a Network-on-Chip.  ...  CGRAs were proposed to overcome the limitation of conventional microprocessors and fine-grained reconfigurable devices in certain application domains such as multimedia and communication baseband processing  ... 
doi:10.21553/rev-jec.147 fatcat:zqjzktktbjh4los7luipp45cvy

Coarse-Grained Reconfigurable Array: Architecture and Application Mapping

Kiyoung Choi
2011 IPSJ Transactions on System LSI Design Methodology  
The difference between fine-grained reconfigurable arrays (FGRAs) and CGRAs is in the granularity of reconfiguration.  ...  Therefore, the overhead of reconfiguration of a CGRA is much lower than that of an FGRA, thereby making it easy to reconfigure a CGRA dynamically.  ...  His primary interests include various aspects of computer-aided electronic systems design including embedded systems design, high-level synthesis, and low-power systems design.  ... 
doi:10.2197/ipsjtsldm.4.31 fatcat:46ph7de3wreexmn6wl3ealzzhy

Performance Portability Across Heterogeneous SoCs Using a Generalized Library-Based Approach

Shuangde Fang, Chengyong Wu, Zidong Du, Yuntan Fang, Yuanjie Huang, Yang Chen, Lieven Eeckhout, Olivier Temam, Huawei Li, Yunji Chen
2014 ACM Transactions on Architecture and Code Optimization (TACO)  
Using a set of benchmarks run on a real heterogeneous SoC composed of a multicore processor and a GPU, we show that the runtime overhead is fairly small at 5.1% for the GPU and 6.4% for the multi-core.  ...  In this article, we present a software framework for achieving performance portability by leveraging a generalized library-based approach.  ...  ACKNOWLEDGMENTS We would like to thank the anonymous reviewers for their valuable feedback. Y.  ... 
doi:10.1145/2608253 fatcat:ekgjnxiy6jdoxim3t2snisx2ly

Low-Power Loop Parallelization onto CGRA Utilizing Variable Dual VDD

Bing XU, Shouyi YIN, Leibo LIU, Shaojun WEI
2015 IEICE transactions on information and systems  
Coarse Grained Reconfigurable Architectures (CGRAs) are promising platform based on its high-performance and low cost.  ...  Hence non-critical PEs can decrease the supply voltage according to its slack time. The variable Dual-V DD CGRA incorporates this feature to reduce power consumption.  ...  managing the fine-grain reconfigurable units.  ... 
doi:10.1587/transinf.2014rcp0004 fatcat:txflhvqaifhhrk7tvo67sdzkwa

Row-based configuration mechanism for a 2-D processing element array in coarse-grained reconfigurable architecture

LeiBo Liu, YanSheng Wang, ShouYi Yin, Min Zhu, Xing Wang, ShaoJun Wei
2014 Science China Information Sciences  
Using the coarser operand grain and simplified interconnection patterns, CGRA (coarse grained reconfigurable architectures) has been proven to be energy efficient in several specific domains.  ...  Row-based configuration mechanism for a 2-D processing element array in coarse-grained reconfigurable architecture.  ...  The typical overhead in fine-grained FPGAs is reduced in CGRAs by exploiting a coarser operand grain.  ... 
doi:10.1007/s11432-013-4973-8 fatcat:2f4ajx2u7bdjjbs6nrzw25tqde

Reconfigurable Architectures [chapter]

Mansureh Shahraki Moghaddam, Jae-Min Cho, Kiyoung Choi
2017 Handbook of Hardware/Software Codesign  
This chapter discusses two major streams of reconfigurable architecture: Field-Programmable Gate Array (FPGA) and Coarse Grained Reconfigurable Architecture (CGRA).  ...  It also explains techniques for mapping applications onto FPGAs and CGRAs. Acronyms ALAP As Late As Possible ALM Adaptive Logic Module ALU Arithmetic-Logic Unit ASAP As Soon as Possible ASIC  ...  While FPGAs provide fine-grained (gate level) reconfigurability, CGRAs provide coarse-grained (register transfer level) reconfigurability.  ... 
doi:10.1007/978-94-017-7267-9_12 fatcat:bkvbwe3frjhclfdidzburz36ju

State of the art baseband DSP platforms for Software Defined Radio: A survey

Omer Anjum, Tapani Ahonen, Fabio Garzia, Jari Nurmi, Claudio Brunelli, Heikki Berg
2011 EURASIP Journal on Wireless Communications and Networking  
Software Defined Radio (SDR) is an innovative approach which is becoming a more and more promising technology for future mobile handsets.  ...  Several proposals in the field of embedded systems have been introduced by different universities and industries to support SDR applications.  ...  There could be an entire set of reconfigurable machines ranging from fine grain custom FPGAs to CGRAs.  ... 
doi:10.1186/1687-1499-2011-5 fatcat:apmz6jd4cbdcrpb76qnungmirq
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