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A Formally Verified, Optimized Monitor for Metric First-Order Dynamic Logic [chapter]

David Basin, Thibault Dardinier, Lukas Heimes, Srđan Krstić, Martin Raszyk, Joshua Schneider, Dmitriy Traytel
2020 Lecture Notes in Computer Science  
We describe the development and correctness proof in Isabelle/HOL of a monitor for metric first-order dynamic logic.  ...  This monitor significantly extends previous work on formally verified monitors by supporting aggregations, regular expressions (the dynamic part), and optimizations including multi-way joins adopted from  ...  The authors are listed in alphabetical order.  ... 
doi:10.1007/978-3-030-51074-9_25 fatcat:romzocd6fna7bhmouu66olhiie

BraceAssertion: Runtime Verification of Cyber-Physical Systems

Xi Zheng, Christine Julien, Rodion Podorozhny, Franck Cassez
2015 2015 IEEE 12th International Conference on Mobile Ad Hoc and Sensor Systems  
To reduce runtime overhead and support properties that reference predicate logic, we use a second monitor automaton to create filtered traces on which to run the analysis using the specification monitor  ...  This paper presents BraceAssertion, a specification framework based on natural language queries that are automatically converted to a determinitic class of timed automata used for runtime monitoring.  ...  Metric First-Order Temporal Logic (MFOTL) [13] adds first-order logic expressiveness and metrics to quantify timing constraints [7] .  ... 
doi:10.1109/mass.2015.15 dblp:conf/mass/ZhengJPC15 fatcat:qfm4xn6tojcfhm7jdwiwnaq4ze

Formal Verification of Analog and Mixed Signal Designs: Survey and Comparison

Mohamed Zaki, Sofiene Tahar, Guy Bois
2006 2006 IEEE North-East Workshop on Circuits and Systems  
Researchers started lately studying the applicability of formal methods for the verification of AMS systems as a way to tackle the limitations of conventional verification methods like simulation.  ...  This paper surveys research activities in the formal verification of AMS designs as well as compares the different proposed approaches.  ...  The basic idea is based on validity checking of first order formulas over a finite interval of time.  ... 
doi:10.1109/newcas.2006.250926 fatcat:lv3amsihvjdori7ucu4ryxq4i4

Towards Formal Planning for Quality-Aware Self-Adaptive Systems

Esma Maatougui, Chafia Bouanaka, Nadia Zeghib
2017 2017 IEEE 26th International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE)  
formal language) to define a development process for quality-aware selfadaptive software.  ...  However, designing and verifying quality-aware self-adaptive systems remains a challenging task.  ...  The role of MDE is the definition of system graphical models and formal methods serve to validate and verify the self-adaptive system in order to guarantee that system model satisfies global properties  ... 
doi:10.1109/wetice.2017.22 dblp:conf/wetice/MaatouguiBZ17 fatcat:mrwmrkqmibairbwnjntuu5hm7a

Temporal Logic Verification Using Simulation [chapter]

Georgios E. Fainekos, Antoine Girard, George J. Pappas
2006 Lecture Notes in Computer Science  
order to verify the system.  ...  In this paper, we consider a novel approach to the temporal logic verification problem of continuous dynamical systems.  ...  (1) Here,ẋ denotes the first order derivative of the function x.  ... 
doi:10.1007/11867340_13 fatcat:kr6naar4n5d57mhjotxezccdcm

A Survey of Challenges for Runtime Verification from Advanced Application Domains (Beyond Software) [article]

César Sánchez and Gerardo Schneider and Wolfgang Ahrendt and Ezio Bartocci and Domenico Bianculli and Christian Colombo and Yliés Falcone and Adrian Francalanza and Sran Krstić and Joa̋o M. Lourenço and Dejan Nickovic and Gordon J. Pace and Jose Rufino and Julien Signoles and Dmitriy Traytel and Alexander Weiss
2018 arXiv   pre-print
Runtime verification is an area of formal methods that studies the dynamic analysis of execution traces against formal specifications.  ...  Typically, the two main activities in runtime verification efforts are the process of creating monitors from specifications, and the algorithms for the evaluation of traces against the generated monitors  ...  The authors would like to thank Fonenantsoa Maurica and Pablo Picazo-Sanchez for their feedback on parts of a preliminary version of this document.  ... 
arXiv:1811.06740v1 fatcat:4bxx5tvfpzez3jidsj22flibv4

Deriving a simulation input generator and a coverage metric from a formal specification

K. Shimizu, D.L. Dill
2002 Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)  
This paper presents novel uses of functional interface specifications for verifying RTL designs.  ...  We demonstrate how a simulation environment, a correctness checker, and a functional coverage metric are all created automatically from a single specification.  ...  As a first order approximation of corner cases, the antecedents of the constraints are used.  ... 
doi:10.1109/dac.2002.1012732 fatcat:es25txzvurajdfrmjjiiumxrzu

Deriving a simulation input generator and a coverage metric from a formal specification

Kanna Shimizu, David L. Dill
2002 Proceedings - Design Automation Conference  
This paper presents novel uses of functional interface specifications for verifying RTL designs.  ...  We demonstrate how a simulation environment, a correctness checker, and a functional coverage metric are all created automatically from a single specification.  ...  As a first order approximation of corner cases, the antecedents of the constraints are used.  ... 
doi:10.1145/513918.514118 dblp:conf/dac/ShimizuD02 fatcat:amh5ghngdbabxkcaf2iu46insm

Deriving a simulation input generator and a coverage metric from a formal specification

Kanna Shimizu, David L. Dill
2002 Proceedings - Design Automation Conference  
This paper presents novel uses of functional interface specifications for verifying RTL designs.  ...  We demonstrate how a simulation environment, a correctness checker, and a functional coverage metric are all created automatically from a single specification.  ...  As a first order approximation of corner cases, the antecedents of the constraints are used.  ... 
doi:10.1145/514117.514118 fatcat:jzhpubiptzfd3h3loqda6q5vfe

Formal verification of analog and mixed signal designs: A survey

Mohamed H. Zaki, Sofiène Tahar, Guy Bois
2008 Microelectronics Journal  
Researchers started lately studying the applicability of formal methods for the verification of AMS systems as a way to tackle the limitations of conventional verification methods like simulation.  ...  This paper surveys research activities in the formal verification of AMS designs as well as compares the different proposed approaches.  ...  Temporal logics [8] are logical formalisms designed for expressing such properties. Model checking [8] is a powerful technique for the automatic verification of dynamic properties of the system.  ... 
doi:10.1016/j.mejo.2008.05.013 fatcat:527gyri32nd3vjmnfavyiud36m

Modeling and Testing Multi-Agent Traffic Rules within Interactive Behavior Planning [article]

Klemens Esterle, Luis Gressenbuch, Alois Knoll
2020 arXiv   pre-print
Moving forward, this gives us a generic framework to formalize traffic rules for autonomous vehicles.  ...  The interactive behavior planning problem is formulated as a dynamic game and solved using Monte Carlo Tree Search, for which we contribute a new method to integrate history-dependent traffic rules into  ...  Linear Temporal Logic on Finite Traces Linear Temporal Logic is a discrete formal logic to reason not just about an absolute truth but about truths which might hold only at some points in time.  ... 
arXiv:2009.14186v1 fatcat:sg7s4xpolzgqzmwuc6goxjrxju

Formal verification of a hybrid machine learning-based fault prediction model in Internet of Things applications

Alireza Souri, Amin Salih Mohammed, Moayad Yousif Potrus, Mazhar Hussain Malik, Fatemeh Safara, Mehdi Hosseinzadeh
2020 IEEE Access  
In particular, the PSO is used for feature selection. Then, the fault prediction is considered as a behavior to be verified formally.  ...  This paper presents a behavioral modeling and formal verification of a hybrid machine learning-based fault prediction model with Multi-Layer Perceptron (MLP) and Particle Swarm Optimization (PSO) algorithms  ...  First, the Linear Temporal Logic (LTL) properties are defined as a temporal logic language for the system behaviors in this section.  ... 
doi:10.1109/access.2020.2967629 fatcat:sju6hqiypnhm5aqkzwf4igcrki

A survey of challenges for runtime verification from advanced application domains (beyond software)

César Sánchez, Gerardo Schneider, Wolfgang Ahrendt, Ezio Bartocci, Domenico Bianculli, Christian Colombo, Yliés Falcone, Adrian Francalanza, Srđan Krstić, Joa̋o M. Lourenço, Dejan Nickovic, Gordon J. Pace (+4 others)
2019 Formal methods in system design  
Runtime verification is an area of formal methods that studies the dynamic analysis of execution traces against formal specifications.  ...  Typically, the two main activities in runtime verification efforts are the process of creating monitors from specifications, and the algorithms for the evaluation of traces against the generated monitors  ...  The authors would like to thank Fonenantsoa Maurica and Pablo Picazo-Sanchez for their feedback on parts of a preliminary version of this document, and the anonymous reviewers for the constructive corrections  ... 
doi:10.1007/s10703-019-00337-w fatcat:6vu5odqyjjbkvf255bsxcchane

A Performance-Oriented Monitoring System for Security Properties in Cloud Computing Applications

A. Munoz, J. Gonzalez, A. Mana
2012 Computer journal  
In this paper, we introduce a new and robust architecture for dynamic security monitoring and enforcement specially designed for cloud computing scenarios.  ...  Our solution is therefore a complete one including a three-layered architecture, a new language for expressing monitoring rules and a strategy based on the generation of a finite-state machine to improve  ...  ACKNOWLEDGEMENTS Authors would like to thank Prof George Spanoudakis for his comments and advice on the initial versions of this work.  ... 
doi:10.1093/comjnl/bxs042 fatcat:2jsqrflrzfattdbpsyzn4kuvqy

Integrating Modelling of Maintenance Policies within a Stochastic Hybrid Automaton Framework of Dynamic Reliability

Simone Arena, Irene Roda, Ferdinando Chiacchio
2021 Applied Sciences  
Recently, a DPRA-oriented SHA modelling formalism, known as Stochastic Hybrid Fault Tree Automaton (SHyFTA), has been formalized together with a software library (SHyFTOO) that simplifies the resolution  ...  One of the most promising methodologies for the analysis of complex systems is Dynamic Reliability (also known as DPRA) with models that define explicitly the interactions between components and variables  ...  This modelling can be implemented by the use of a 2-input PAND gate that takes as first input the condition monitoring sensor and a second input the system to monitor.  ... 
doi:10.3390/app11052300 doaj:8109ca432ec04161a52ccbcae527fca1 fatcat:c5ttmvfyanfnxdz3gtknuzsu3q
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