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A FPGA-based implementation of a fault-tolerant neural architecture for photon identification

M. Alderighi, E. L. Gummati, V. Piuri, G. R. Sechi
1997 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays - FPGA '97  
The paper presents therefore an FPGA-based implementation of a fault tolerant neural architecture for event identification.  ...  A system capable of identifying these events on board of satellites needs fault tolerant capabilities to certify result correctness.  ...  In this paper, we present an application of the FPGA technologies for prototyping in the space area: the design and the implementation of an FPGA-based fault tolerant neural architecture for event identification  ... 
doi:10.1145/258305.258336 dblp:conf/fpga/AlderighiGPS97 fatcat:4gvpni3esnh53imjpy4jjtjogy

Field Programmable Gate Array Applications—A Scientometric Review

Juan Ruiz-Rosero, Gustavo Ramirez-Gonzalez, Rahul Khanna
2019 Computation  
These publications show the vast range of applications based on FPGAs, from the new mechanism that enables the magnetic suspension system for the kilogram redefinition, to the Mars rovers' navigation systems  ...  Field Programmable Gate Array (FPGA) is a general purpose programmable logic device that can be configured by a customer after manufacturing to perform from a simple logic gate operations to complex systems  ...  Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs.  ... 
doi:10.3390/computation7040063 fatcat:wxtatzsvvnfopghdfl25hcfc2a

2021 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 40

2021 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The Author Index contains the primary entry for each item, listed under the first author's name.  ...  The primary entry includes the coauthors' names, the title of the paper or other item, and its location, specified by the publication abbreviation, year, month, and inclusive pagination.  ...  ., +, TCAD Jan. 2021 38-51 Methodology for Distributed-ROM-Based Implementation of Finite State Machines.  ... 
doi:10.1109/tcad.2021.3136047 fatcat:ppooj4g65nc2zonj7szclerc2y

2021 Index IEEE Transactions on Very Large Scale Integration (VLSI) Systems Vol. 29

2021 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
The Author Index contains the primary entry for each item, listed under the first author's name.  ...  The primary entry includes the coauthors' names, the title of the paper or other item, and its location, specified by the publication abbreviation, year, month, and inclusive pagination.  ...  ., +, TVLSI June 2021 1271-1284 Fault diagnosis Design of FPGA-Implemented Reed-Solomon Erasure Code (RS-EC) Banerjee, S., +, TVLSI Feb. 2021 409-422 X-Tolerant Compactor maXpress for In-System Test Applications  ... 
doi:10.1109/tvlsi.2021.3136367 fatcat:fwqswbyzejgfhgbzywrvsf2qgi

Papers by Title

2021 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW)  
Tool for Fault-tolerant Routing Methods on Network-on-Chips A DRL based Real-time Computing Load Scheduling Method A Fault-Tolerant Routing Method Using Bus Functions in Two-dimensional Torus Network-on-Chips  ...  Fitness Application based on Realtime Image Detection Design and Implement a Smart Umbrella Stand System with Instant Message Application Design and Implementation of Intelligent Identification System  ... 
doi:10.1109/icce-tw52618.2021.9602951 fatcat:x5phgfzzl5cafcxul53thv5w7e

The M2DC Project: Modular Microserver DataCentre

Mariano Cecowski, Giovanni Agosta, Ariel Oleksiak, Michal Kierzynka, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mario Porrmann, Jens Hagemeyer, Rene Griessl, Meysam Peykanu, Lennart Tigges (+13 others)
2016 2016 Euromicro Conference on Digital System Design (DSD)  
This paper provides an overview of the different topics FPGAs have been used for in the last 15 years of research and why they have been chosen over other processing units like e.g. CPUs.  ...  Since their introduction, FPGAs can be seen in more and more different fields of applications.  ...  Toroidal mesh based toroidal neural processor (TNP) 2001 [106] Simulation Fault injector for dependability evaluation of processor-based system 2001 [107] Space Fault-tolerant redundant multistage  ... 
doi:10.1109/dsd.2016.76 dblp:conf/dsd/CecowskiAOKBCKP16 fatcat:bu4nbkqaejebjafrotibui6mkq

Table of contents

2020 IEEE Transactions on Circuits and Systems - II - Express Briefs  
Xie 3327 A Novel Architecture for Early Detection of Negative Output Features in Deep Neural Network Accelerators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  ...  A. Ballo, A. D. Grasso, and G. Palumbo 3312 Digital Circuits and Systems (and VLSI) VLSI Implementation of Lossless ECG Compression Algorithm for Low Power Devices . . . . T.-H. Tsai and M. A.  ... 
doi:10.1109/tcsii.2020.3034472 fatcat:vihnrsgzbbb6de3qjq4sk2ogty

Table of contents

2020 IEEE Transactions on Circuits and Systems - II - Express Briefs  
Almakhles 2647 Hyperbolic CORDIC-Based Architecture for Computing Logarithm and Its Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  ...  Yu 2662 Hardware Implementation of an Improved Stochastic Computing Based Deep Neural Network Using Short Sequence Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  ... 
doi:10.1109/tcsii.2020.3027448 fatcat:x7mjrz567bfv7nmou7bot3q62a

2018 IndexIEEE Transactions on Very Large Scale Integration (VLSI) SystemsVol. 26

2018 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
., see 2723-2736 , VLSI Design of an ML-Based Power-Efficient Motion Estimation Controller for Intelligent Mobile Systems; TVLSI Feb. 2018 262-271 Hsieh, Y., see Tsai, Y., TVLSI May 2018 945-957  ...  Hsu, K., Chen, Y., Lee, Y., and Chang, S., Contactless Testing for Prebond Interposers; TVLSI June 2018 1005-1014 Hsu, Y., see Liu, Z., 1565-1574 Hu, J., see Wang, Y., TVLSI May 2018 805-817 Hu, J  ...  ., TVLSI Nov. 2018 2567-2571 Fault tolerance A Design of Autonomous Error-Tolerant Architectures for Massively Parallel Computing.  ... 
doi:10.1109/tvlsi.2019.2892312 fatcat:rxiz5duc6jhdzjo4ybcxdajtbq

2020 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 39

2020 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
Sharma, A., +, TCAD July 2020 1456-1469 Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips.  ...  ., +, TCAD Nov. 2020 4006-4017 SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations.  ...  Entropy-Directed Scheduling for FPGA High-Level Synthesis. Shen, M., +, TCAD Oct. 2020 2588 -2601 FLASH: Fast, Parallel, and Accurate Simulator for HLS.  ... 
doi:10.1109/tcad.2021.3054536 fatcat:wsw3olpxzbeclenhex3f73qlw4

Content

2020 2020 11th IEEE Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON)  
Neural Networks 0351 SESSION 12: ARTIFICIAL INTELLEGENCE 12.1 1570678215 Reinforcement Learning Based Framework for Real Time Fault Tolerance 0357 12.2 1570680479 Autonomous Electromagnetic  ...  08.4 1570681165 Advances in FPGA Based PWM Generation for Power Electronics Applications: Literature Review 0252 08.5 1570681505 A Mamdani Fuzzy System Implementation on Arduino UNO and FPGA  ... 
doi:10.1109/iemcon51383.2020.9284848 fatcat:4ltdf33yerce3avsxsgjlcb7iy

2020 Index IEEE Transactions on Circuits and Systems I: Regular Papers Vol. 67

2020 IEEE Transactions on Circuits and Systems Part 1: Regular Papers  
Fault-Tolerant Control Based on Virtual Actuator and Sensor for Discrete-Time Descriptor Systems.  ...  O⁴-DNN: A Hybrid DSP-LUT-Based Processing Unit With Operation Packing and Out-of-Order Execution for Efficient Realization of Convolutional Neural Networks on FPGA Devices.  ...  ., +, 48-59 A PVT-Resilient, Highly-Linear Fifth-Order Ring-Oscillator-Based Filter.  ... 
doi:10.1109/tcsi.2021.3055003 fatcat:kbmst5td2bbvtl7vpbj3knnkri

2018 Index IEEE Transactions on Circuits and Systems I: Regular Papers Vol. 65

2018 IEEE Transactions on Circuits and Systems Part 1: Regular Papers  
., +, TCSI May 2018 1664-1674 Fault tolerance Adaptive Fault-Tolerant Consensus for a Class of Uncertain Nonlinear Second-Order Multi-Agent Systems With Circuit Implementation.  ...  ., +, TCSI April 2018 1293-1302 Fault tolerant computing Homeostatic Fault Tolerance in Spiking Neural Networks: A Dynamic Hardware Perspective.  ... 
doi:10.1109/tcsi.2019.2896877 fatcat:3lzpngw2ofdjhiculf7ehrjeam

Papers by Title

2019 2019 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW)  
Using Residual Convolutional Neural NetworkImplementation of ransomware prediction system based on weighted-KNN and real-time isolation architecture on SDN Networks Implementing a Neural Network Controller  ...  Fault-Tolerant Routing Methods Based on the Passage of Fault Blocks Performance of Bismuth Modified Carbon Nanotube Composite Titanium Electrode in Advanced Oxidation Process System Personalized ACC System  ... 
doi:10.1109/icce-tw46550.2019.8991721 fatcat:62376ymadzge3g5xomicr5tesq

Front Matter: Volume 10031

2016 Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2016  
video quality assessment [10031-85] 10031 4M Fault tolerance techniques for embedded telemetry system: case study [10031-86] 10031 4N Reduction of influence of gain errors on performance of adaptive  ...  in FPGAs [10031-201] 10031 5C Extraction of essential features by quantum density [10031-202] 10031 5D Leverage estimation for multi-output neural networks [10031-216] 10031 5E Deep learning  ... 
doi:10.1117/12.2257157 fatcat:dyugwlewqzc5rkmnw7pktaozmy
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