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A 9.43-ENOB 160MS/s 1.2V 65nm CMOS ADC based on multi-stage amplifiers

Young-Ju Kim, Hee-Cheol Choi, Kyung-Hoon Lee, Gil-Cho Ahn, Seung-Hoon Lee, Ju-Hwa Kim, Kyoung-Jun Moon, Michael Choi, Kyoung-Ho Moon, Ho-Jin Park, Byeong-Ha Park
2009 2009 IEEE Custom Integrated Circuits Conference  
The proposed multipath frequency-compensation technique enables the conventional RNMC-based three-stage amplifier to achieve a stable operation at a sampling rate of 160MS/s.  ...  A 12-bit 1.2V 160MS/s pipeline ADC for highdefinition video systems is presented.  ...  This work proposes a 12-bit 160MS/s 1.2V 65nm CMOS pipeline ADC based on multi-stage amplifiers.  ... 
doi:10.1109/cicc.2009.5280857 dblp:conf/cicc/KimCLALKMCMPP09 fatcat:anmbeezttzcirpmrnmsbyhfw3a