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Introduction to the January Special Issue on the 2015 IEEE International Solid-State Circuits Conference

2016 IEEE Journal of Solid-State Circuits  
., describes a 128 Gb 3b/cell vertical-NAND flash memory that incorporates 1 Gb/s I/O. It is implemented with a 3-D stacking technology and uses 32 stack wordline (WL) layers.  ...  These papers describe significant innovations in the field, including 64 Gb MLC NAND Flash, 128 Gb 3b/cell V-NAND Flash, 28 nm SG-MONOS Flash macro, 0.6 V 84 Mb SRAM in 14 nm FinFET, and 14 nm 1.1 Mb Embedded  ... 
doi:10.1109/jssc.2015.2502519 fatcat:3n3wglza3zgllnjb2bgutznaru