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We augment virtual memory to allow each page to specify its preferred granularity of access based on spatial locality and errortolerance tradeoffs. ... We evaluate our architecture with and without ECC using memory intensive benchmarks from the SPEC, Olden, PARSEC, SPLASH2, and HPCS benchmark suites and micro-benchmarks. ... The definitive version was published in the Proceedings of ISCA'11 June 4-8, San Jose, CA, USA. ...doi:10.1145/2000064.2000100 dblp:conf/isca/YoonJE11 fatcat:ty3xafhgl5dxbj3kz5v2uor3da
The runtime combines collaborative filtering to infer the behavior of each job on every core and cache configuration, with Dynamically Dimensioned Search to efficiently explore the configuration space. ... We evaluate CuttleSys on multicores with tens of reconfigurable cores and show up to 2.46x and 1.55x performance improvements compared to core-level gating and oracle-like asymmetric multicores respectively ... International Symposium on Computer Architecture (ISCA), June  D. ...arXiv:2008.00329v1 fatcat:ixlacql2srfsldcosl6wpbldua
Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology
ACKNOWLEDGMENT e authors thank Vladimir Yutsis for his helpful feedback on Section 1.5.2. ... In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, 2011, pp. 632-639. 20. Chinnery, D. et al. ... , San Francisco, CA, June 1991. ...doi:10.1201/9781315215112-13 fatcat:me52zpnxyfcczh3choo2p4zulm