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Scavenger: Automating the construction of application-optimized memory hierarchies

Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel Emer
2015 2015 25th International Conference on Field Programmable Logic and Applications (FPL)  
programmer FPGA SRAM SRAM DRAM LUTs PCIE User Program • Implementation details are handled by programmers • Hardware can be optimized for the target application • Hardware is optimized for a set of applications  ...  Abstraction • Abstraction hides implementation details and provides good programmability 2 C/Python Application Memory Processor Instruction Set Architecture CPU I/O Operating System Software Hardware  ...  • A clean memory abstraction • A rich set of memory building blocks • Intelligent algorithms to analyze programs and automatically compose memory hierarchies Application-Optimized Memory Subsystems  ... 
doi:10.1109/fpl.2015.7294018 dblp:conf/fpl/YangFAWE15 fatcat:2qslfytbnfarvmtzg6jyfe5d4a