Tolerating hard faults in microprocessor array structures

by F.A. Bower, P.G. Shealy, S. Ozev, D.J. Sorin

Published in Dependable Systems and Networks by IEEE.

2004 p51-60

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Year 2004

DOI 10.1109/dsn.2004.1311876
dblp conf/dsn/BowerSOS04

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