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Trading cache hit rate for memory performance
release_a7j3vxei3bas3bbmasntq2bcua
by
Wei Ding,
Mahmut Kandemir,
Diana Guttman,
Adwait Jog,
Chita R. Das,
Praveen Yedlapalli
Published
in International Conference on Parallel Architectures and Compilation Techniques
by ACM Press.
2014 p357-368
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