Branch prediction, instruction-window size, and cache size: performance trade-offs and simulation techniques

by K. Skadron, P.S. Ahuja, M. Martonosi, D.W. Clark

Published in IEEE transactions on computers by Institute of Electrical and Electronics Engineers (IEEE).

1999 Volume 48, Issue 11, p1260-1281

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Year 1999

DOI 10.1109/12.811115

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